Datasheet

STM32F101xC, STM32F101xD, STM32F101xE Description
Doc ID 14610 Rev 8 11/112
2.1 Device overview
The STM32F101xx high-density access line family offers devices in 3 different package
types: from 64 pins to 144 pins. Depending on the device chosen, different sets of
peripherals are included, the description below gives an overview of the complete range of
peripherals proposed in this family.
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Figure 1 shows the general block diagram of the device family.
Table 2. STM32F101xC, STM32F101xD and STM32F101xE features and peripheral
counts
Peripherals STM32F101Rx STM32F101Vx STM32F101Zx
Flash memory in Kbytes 256 384 512 256 384 512 256 384 512
SRAM in Kbytes 32 48 32 48 32 48
FSMC No Yes
(1)
1. For the LQFP100 package, only FSMC Bank1 and Bank2 are available. Bank1 can only support a
multiplexed NOR/PSRAM memory using the NE1 Chip Select. Bank2 can only support a 16- or 8-bit
NAND Flash memory using the NCE2 Chip Select. The interrupt line cannot be used since Port G is not
available in this package.
Ye s
Timers
General-
purpose
4
Basic 2
Comm
SPI 3
I
2
C2
USART 5
GPIOs 51 80 112
12-bit ADC
Number of channels
1
16
1
16
1
16
12-bit DAC
Number of channels
1
2
CPU frequency 36 MHz
Operating voltage 2.0 to 3.6 V
Operating temperatures
Ambient temperature: –40 to +85 °C (see Tabl e 10)
Junction temperature: –40 to +105 °C (see Tabl e 1 0)
Package LQFP64 LQFP100 LQFP144