Datasheet

Electrical characteristics STM32F101x4, STM32F101x6
64/79 Doc ID 15058 Rev 5
5.3.17 12-bit ADC characteristics
Unless otherwise specified, the parameters given in Ta bl e 4 2 are derived from tests
performed under the ambient temperature, f
PCLK2
frequency and V
DDA
supply voltage
conditions summarized in Ta bl e 8 .
Note: It is recommended to perform a calibration after each power-up.
Table 42. ADC characteristics
Symbol Parameter Conditions Min Typ Max Unit
V
DDA
Power supply 2.4 3.6 V
f
ADC
ADC clock frequency 0.6 14 MHz
f
S
(1)
Sampling rate 0.05 1 MHz
f
TRIG
(1)
External trigger frequency
f
ADC
= 14 MHz 823 kHz
17 1/f
ADC
V
AIN
Conversion voltage range
(2)
0 (V
SSA
or V
REF-
tied to ground)
V
REF+
V
R
AIN
(1)
External input impedance
See Equation 1 and
Ta bl e 43 for details
50 kΩ
R
ADC
(1)
Sampling switch resistance 1 kΩ
C
ADC
(1)
Internal sample and hold
capacitor
8pF
t
CAL
(1)
Calibration time
f
ADC
= 14 MHz 5.9 µs
83 1/f
ADC
t
lat
(1)
Injection trigger conversion
latency
f
ADC
= MHz 0.214 µs
3
(3)
1/f
ADC
t
latr
(1)
Regular trigger conversion
latency
f
ADC
= 14 MHz 0.143 µs
2
(3)
1/f
ADC
t
S
(1)
Sampling time f
ADC
= 14 MHz
0.107 17.1 µs
1.5 239.5 1/f
ADC
t
STAB
(1)
Power-up time 0 0 1 µs
t
CONV
(1)
Total conversion time
(including sampling time)
f
ADC
= 14 MHz 1 18 µs
14 to 252 (t
S
for sampling +12.5 for
successive approximation)
1/f
ADC
1. Guaranteed by design, not tested in production.
2. V
REF+
is internally connected to V
DDA
and V
REF-
is be internally connected to V
SSA
.
3. For external triggers, a delay of 1/f
PCLK2
must be added to the latency specified in Table 42.