Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 48 (7x7) 32-Bit 36 MHz I/O number 37

STM32F101x4, STM32F101x6 Pinouts and pin description

Doc ID 15058 Rev 5 25/79

40 56 31 PB4 I/O FT NJTRST

TIM3_CH1 / PB4

SPI_MISO

41 57 32 PB5 I/O PB5 I2C_SMBA

TIM3_CH2 /

SPI_MOSI

42 58 33 PB6 I/O FT PB6 I2C_SCL

(7)

USART1_TX

43 59 34 PB7 I/O FT PB7 I2C_SDA

(7)

USART1_RX

44 60 35 BOOT0 I BOOT0

45 61 - PB8 I/O FT PB8 I2C_SCL

46 62 - PB9 I/O FT PB9 I2C_SDA

47 63 36 V

SS_3

48 64 1 V

DD_3

1. I = input, O = output, S = supply.

2. FT= 5 V tolerant.

3. Function availability depends on the chosen device. For devices having reduced peripheral counts, it is always the lower

number of peripherals that is included. For example, if a device has only one SPI, two USARTs and two timers, they will be

called SPI, USART1 & USART2 and TIM2 & TIM 3, respectively. Refer to Table 2 on page 11.

4. If several peripherals share the same I/O pin, to avoid conflict between these alternate functions only one peripheral should

be enabled at a time through the peripheral clock enable bit (in the corresponding RCC peripheral clock enable register).

5. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current

(3 mA), the use of GPIOs PC13 to PC15 in output mode is limited: the speed should not exceed 2 MHz with a maximum

load of 30 pF and these IOs must not be used as a current source (e.g. to drive an LED).

6. Main function after the first backup domain power-up. Later on, it depends on the contents of the Backup registers even

after reset (because these registers are not reset by the main reset). For details on how to manage these IOs, refer to the

Battery backup domain and BKP register description sections in the STM32F10xxx reference manual, available from the

STMicroelectronics website: www.st.com.

7. This alternate function can be remapped by software to some other port pins (if available on the used package). For more

details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual, available

from the STMicroelectronics website: www.st.com.

8. The pins number 2 and 3 in the VFQFPN36 package, and 5 and 6 in the LQFP48 and LQFP64 packages are configured as

OSC_IN/OSC_OUT after reset, however the functionality of PD0 and PD1 can be remapped by software on these pins. For

more details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual.

Table 4. Low-density STM32F101xx pin definitions (continued)

Pins

Pin name

Type

(1)

I / O level

(2)

Main

function

(3)

(after reset)

Alternate functions

(3)(4)

LQFP48/

VFQFPN48

LQFP64

VFQFPN36

Default Remap