Datasheet

Electrical characteristics STM32F100xC, STM32F100xD, STM32F100xE
56/98 Doc ID 15081 Rev 7
Table 30. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings
(1) (2)
1. C
L
= 15 pF.
2. Preliminary values.
Symbol Parameter Min Max Unit
t
w(NE)
FSMC_NE low time 5T
HCLK
– 1.5 5T
HCLK
+ 2 ns
t
v(NOE_NE)
FSMC_NEx low to FSMC_NOE low 0.5 1.5 ns
t
w(NOE)
FSMC_NOE low time 5T
HCLK
– 1.5 5T
HCLK
+ 1.5 ns
t
h(NE_NOE)
FSMC_NOE high to FSMC_NE high hold time –1.5 ns
t
v(A_NE)
FSMC_NEx low to FSMC_A valid 0 ns
t
h(A_NOE)
Address hold time after FSMC_NOE high 0.1 ns
t
v(BL_NE)
FSMC_NEx low to FSMC_BL valid 0 ns
t
h(BL_NOE)
FSMC_BL hold time after FSMC_NOE high 0 ns
t
su(Data_NE)
Data to FSMC_NEx high setup time 2T
HCLK
+ 25 ns
t
su(Data_NOE)
Data to FSMC_NOEx high setup time 2T
HCLK
+ 25 ns
t
h(Data_NOE)
Data hold time after FSMC_NOE high 0 ns
t
h(Data_NE)
Data hold time after FSMC_NEx high 0 ns
t
v(NADV_NE)
FSMC_NEx low to FSMC_NADV low 5 ns
t
w(NADV)
FSMC_NADV low time T
HCLK
+ 1.5 ns