Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 100 (14x14) 32-Bit 24 MHz I/O number 80

This is information on a product in full production.

June 2012 Doc ID 16455 Rev 7 1/88

STM32F100x4 STM32F100x6

STM32F100x8 STM32F100xB

Low & medium-density value line, advanced ARM-based 32-bit MCU

with 16 to 128 KB Flash, 12 timers, ADC, DAC & 8 comm interfaces

Datasheet  production data

Features

■ Core: ARM 32-bit Cortex™-M3

CPU

– 24 MHz maximum frequency,

1.25 DMIPS/MHz (Dhrystone 2.1)

performance

– Single-cycle multiplication and hardware

division

■ Memories

– 16 to 128 Kbytes of Flash memory

– 4 to 8 Kbytes of SRAM

■ Clock, reset and supply management

– 2.0 to 3.6 V application supply and I/Os

– POR, PDR and programmable voltage

detector (PVD)

– 4-to-24 MHz crystal oscillator

– Internal 8 MHz factory-trimmed RC

– Internal 40 kHz RC

– PLL for CPU clock

– 32 kHz oscillator for RTC with calibration

■ Low power

– Sleep, Stop and Standby modes

–V

BAT

supply for RTC and backup registers

■ Debug mode

– Serial wire debug (SWD) and JTAG

interfaces

■ DMA

– 7-channel DMA controller

– Peripherals supported: timers, ADC, SPIs,

Cs, USARTs and DACs

■ 1 × 12-bit, 1.2 µs A/D converter (up to 16

channels)

– Conversion range: 0 to 3.6 V

– Temperature sensor

■ 2 × 12-bit D/A converters

■ Up to 80 fast I/O ports

– 37/51/80 I/Os, all mappable on 16 external

interrupt vectors and almost all 5 V-tolerant

■ Up to 12 timers

– Up to three 16-bit timers, each with up to 4

IC/OC/PWM or pulse counter

– 16-bit, 6-channel advanced-control timer:

up to 6 channels for PWM output, dead

time generation and emergency stop

– One 16-bit timer, with 2 IC/OC, 1

OCN/PWM, dead-time generation and

emergency stop

– Two 16-bit timers, each with

IC/OC/OCN/PWM, dead-time generation

and emergency stop

– 2 watchdog timers (Independent and

Window)

– SysTick timer: 24-bit downcounter

– Two 16-bit basic timers to drive the DAC

■ Up to 8 communications interfaces

– Up to two I

C interfaces (SMBus/PMBus)

– Up to 3 USARTs (ISO 7816 interface, LIN,

IrDA capability, modem control)

– Up to 2 SPIs (12 Mbit/s)

– Consumer electronics control (CEC)

interface

■ CRC calculation unit, 96-bit unique ID

■ ECOPACK

packages

Table 1. Device summary

Reference Part number

STM32F100x4 STM32F100C4, STM32F100R4

STM32F100x6 STM32F100C6, STM32F100R6

STM32F100x8

STM32F100C8, STM32F100R8,

STM32F100V8

STM32F100xB

STM32F100CB, STM32F100RB,

STM32F100VB

FBGA

LQFP100 14 × 14 mm

LQFP64 10 × 10 mm

LQFP48 7 × 7 mm

TFBGA64 (5 × 5 mm)

www.st.com

Summary of content (88 pages)

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STM32F100x4 STM32F100x6 STM32F100x8 STM32F100xB Low & medium-density value line, advanced ARM-based 32-bit MCU with 16 to 128 KB Flash, 12 timers, ADC, DAC & 8 comm interfaces Datasheet  production data Features ■ Core: ARM 32-bit Cortex™-M3 CPU – 24 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance – Single-cycle multiplication and hardware division ■ Memories – 16 to 128 Kbytes of Flash memory – 4 to 8 Kbytes of SRAM ■ Clock, reset and supply management – 2.0 to 3.
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Contents STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.1 6 Contents Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.1.
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Contents STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 7 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43.
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List of tables Table 46. Table 47. Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. 6/88 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB DAC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 LQPF100 – 14 x 14 mm, 100-pin low-profile quad flat package mechanical data . . . .
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39.
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List of figures Figure 43. Figure 44. Figure 45. 8/88 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB LQFP48 – 7 x 7 mm, 48-pin low-profile quad flat package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 LQFP100 PD max vs. TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 1 Introduction Introduction This datasheet provides the ordering information and mechanical device characteristics of the STM32F100x4, STM32F100x6, STM32F100x8 and STM32F100xB value line microcontrollers. In the rest of the document, the STM32F100x4 and STM32F100x6 are referred to as low-density devices while the STM32F100x8 and STM32F100xB are identified as medium-density devices.
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Description 2 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Description The STM32F100xx value line family incorporates the high-performance ARM Cortex™-M3 32-bit RISC core operating at a 24 MHz frequency, high-speed embedded memories (Flash memory up to 128 Kbytes and SRAM up to 8 Kbytes), and an extensive range of enhanced peripherals and I/Os connected to two APB buses.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 2.1 Description Device overview The description below gives an overview of the complete range of peripherals proposed in this family. Figure 1 shows the general block diagram of the device family. Table 2.
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Description STM32F100xx value line block diagram AS !& .*4234 *4$) *4#+ 37#,+ *4-3 37$)/ *4$/ AS !& *4!' 37 4RACE CONTROLLER PBUS )BUS #ORTEX - #05 FMAX -(Z 6OLTAGE REG 6 TO 6 &LASH +" 3YSTEM '0 $-! BIT 32! +" 6$$! 0/2 2ESET 3UPPLY SUPERVISION )NT 0/2 0$2 2# (3 6$$! CHANNELS 0!; = '0)/ PORT ! 0"; = '0)/ PORT " !(" & MAX -(Z %84 ) 4 7+50 6$$ 84!, /3# -(Z 0,, !& 633 .
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 2.
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Description STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 2.2 Overview 2.2.1 ARM® Cortex™-M3 core with embedded Flash and SRAM The ARM Cortex™-M3 processor is the latest generation of ARM processors for embedded systems. It has been developed to provide a low-cost platform that meets the needs of MCU implementation, with a reduced pin count and low-power consumption, while delivering outstanding computational performance and an advanced system response to interrupts.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 2.2.6 Description External interrupt/event controller (EXTI) The external interrupt/event controller consists of 18 edge detector lines used to generate interrupt/event requests. Each line can be independently configured to select the trigger event (rising edge, falling edge, both) and can be masked independently. A pending register maintains the status of the interrupt requests.
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Description STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB than the VPVD threshold. The interrupt service routine can then generate a warning message and/or put the MCU into a safe state. The PVD is enabled by software. 2.2.11 Voltage regulator The regulator has three operation modes: main (MR), low power (LPR) and power down.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Description Each channel is connected to dedicated hardware DMA requests, with support for software trigger on each channel. Configuration is made by software and transfer sizes between source and destination are independent. The DMA can be used with the main peripherals: SPI, DAC, I2C, USART, all timers and ADC. 2.2.
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Description STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Advanced-control timer (TIM1) The advanced-control timer (TIM1) can be seen as a three-phase PWM multiplexed on 6 channels. It has complementary PWM outputs with programmable inserted dead times. It can also be seen as a complete general-purpose timer.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Description Their counters can be frozen in debug mode. Basic timers TIM6 and TIM7 These timers are mainly used for DAC trigger generation. They can also be used as a generic 16-bit time base. Independent watchdog The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is clocked from an independent 40 kHz internal RC and as it operates independently from the main clock, it can operate in Stop and Standby modes.
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Description 2.2.18 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Serial peripheral interface (SPI) Up to two SPIs are able to communicate up to 12 Mbit/s in slave and master modes in fullduplex and simplex communication modes. The 3-bit prescaler gives 8 master mode frequencies and the frame is configurable to 8 bits or 16 bits. Both SPIs can be served by the DMA controller. 2.2.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 2.2.23 Description DAC (digital-to-analog converter) The two 12-bit buffered DAC channels can be used to convert two digital signals into two analog voltage signal outputs. The chosen design structure is composed of integrated resistor strings and an amplifier in noninverting configuration.
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Pinouts and pin description 3 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Pinouts and pin description STM32F100xx value line LQFP100 pinout 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 VDD_3 VSS_3 PE1 PE0 PB9 PB8 BOOT0 PB7 PB6 PB5 PB4 PB3 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 PC12 PC11 PC10 PA15 PA14 Figure 3.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB STM32F100xx value line LQFP64 pinout VDD_3 VSS_3 PB9 PB8 BOOT0 PB7 PB6 PB5 PB4 PB3 PD2 PC12 PC11 PC10 PA15 PA14 Figure 4.
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Pinouts and pin description Figure 6.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Low & medium-density STM32F100xx pin definitions (continued) Alternate functions(3)(4) LQFP48 OSC32_OUT TFBGA64 Default LQFP64 Main function(3) (after reset) LQFP100 Type(1) Pins I / O level(2) Table 4.
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Pinouts and pin description Low & medium-density STM32F100xx pin definitions (continued) 26 F5 18 Pin name PB0 Type(1) LQFP64 35 LQFP48 LQFP100 TFBGA64 Pins I / O level(2) Table 4.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Low & medium-density STM32F100xx pin definitions (continued) 37 F6 64 Type(1) LQFP64 63 Alternate functions(3)(4) Main function(3) (after reset) LQFP48 LQFP100 TFBGA64 Pins I / O level(2) Table 4.
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Pinouts and pin description Low & medium-density STM32F100xx pin definitions (continued) 90 56 A4 40 PB4 I/O FT 91 57 C4 41 PB5 I/O PB5 I2C1_SMBA / TIM16_BKIN TIM3_CH2 / SPI1_MOSI 92 58 D3 42 PB6 I/O FT PB6 I2C1_SCL(12)/ TIM4_CH1(11)(12) TIM16_CH1N USART1_TX 93 59 C3 43 PB7 I/O FT PB7 I2C1_SDA(12)/ TIM17_CH1N TIM4_CH2(11)(12) USART1_RX 94 60 B4 44 BOOT0 95 61 B3 45 PB8 I/O FT PB8 TIM4_CH3(11)(12) / TIM16_CH1(12) / CEC(12) I2C1_SCL 96 62 A3 46 PB9 I/O FT PB9 TIM4_CH4
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 4 Memory mapping Memory mapping The memory map is shown in Figure 7. Figure 7.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5 Electrical characteristics 5.1 Parameter conditions Unless otherwise specified, all voltages are referenced to VSS. 5.1.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 8. Pin loading conditions Electrical characteristics Figure 9. Pin input voltage STM32F10xxx pin STM32F10xxx pin C = 50 pF VIN ai14124b ai14123b 5.1.6 Power supply scheme Figure 10. Power supply scheme 6"!4 "ACKUP CIRCUITRY /3# + 24# 7AKE UP LOGIC "ACKUP REGISTERS /54 '0 ) /S ).
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Electrical characteristics 5.1.7 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Current consumption measurement Figure 11. Current consumption measurement scheme IDD_VBAT VBAT IDD VDD VDDA ai14126 5.2 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 5: Voltage characteristics, Table 6: Current characteristics, and Table 7: Thermal characteristics may cause permanent damage to the device.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 6. Electrical characteristics Current characteristics Symbol Ratings Max.
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Electrical characteristics Table 8.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB . Table 10. Embedded reset and power control block characteristics Symbol Parameter Conditions Programmable voltage detector level selection VPVD VPVDhyst Electrical characteristics (2) VPOR/PDR VPDRhyst (2) Min Typ Max Unit PLS[2:0]=000 (rising edge) 2.1 2.18 2.26 V PLS[2:0]=000 (falling edge) 2 2.08 2.16 V PLS[2:0]=001 (rising edge) 2.19 2.28 2.37 V PLS[2:0]=001 (falling edge) 2.09 2.18 2.
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Electrical characteristics 5.3.4 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Embedded reference voltage The parameters given in Table 11 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. Table 11. Symbol VREFINT Embedded internal reference voltage Parameter Internal reference voltage Conditions Min Typ Max Unit –40 °C < TA < +105 °C 1.16 1.20 1.26 V –40 °C < TA < +85 °C 1.16 1.20 1.24 V 5.1 17.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 12. Electrical characteristics Maximum current consumption in Run mode, code with data processing running from Flash Max(1) Symbol Parameter Conditions External clock (2), all peripherals enabled IDD Supply current in Run mode fHCLK Unit TA = 85 °C TA = 105 °C 24 MHz 15.4 15.7 16 MHz 11 11.5 8 MHz 6.7 6.9 24 MHz 10.3 10.5 16 MHz 7.8 8.1 8 MHz 5.1 5.3 mA External clock(2), all peripherals disabled 1.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 12. Maximum current consumption in Run mode versus frequency (at 3.6 V) code with data processing running from RAM, peripherals enabled #ONSUMPTION M! -(Z -(Z -(Z n # # # # 4EMPERATURE # AI Figure 13. Maximum current consumption in Run mode versus frequency (at 3.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 15. Electrical characteristics Typical and maximum current consumptions in Stop and Standby modes Typ(1) Symbol Parameter Conditions VDD/VBAT VDD/ VBAT VDD/VBAT TA = TA = = 2.0 V = 2.4 V = 3.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 15. Typical current consumption in Stop mode with regulator in Run mode versus temperature at VDD = 3.3 V and 3.6 V #ONSUMPTION ! 6 6 n # # # 4EMPERATURE # # AI Figure 16. Typical current consumption in Stop mode with regulator in Low-power mode versus temperature at VDD = 3.3 V and 3.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Figure 17. Typical current consumption in Standby mode versus temperature at VDD = 3.3 V and 3.
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Electrical characteristics Table 16. STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Typical current consumption in Run mode, code with data processing running from Flash Typical values(1) Symbol Parameter Conditions Running on high-speed external clock with an 8 MHz crystal(3) IDD Supply current in Run mode fHCLK All peripherals All peripherals enabled(2) disabled 24 MHz 12.8 9.3 16 MHz 9.3 6.6 8 MHz 5.1 3.9 4 MHz 3.2 2.5 2 MHz 2.1 1.75 1 MHz 1.55 1.4 500 kHz 1.3 1.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 17. Electrical characteristics Typical current consumption in Sleep mode, code running from Flash or RAM Typical values(1) Symbol Parameter Conditions Running on high-speed external clock with an 8 MHz crystal(3) Supply current in Sleep mode IDD fHCLK All peripherals All peripherals enabled(2) disabled 24 MHz 7.3 2.6 16 MHz 5.2 2 8 MHz 2.8 1.3 4 MHz 2 1.1 2 MHz 1.5 1.1 1 MHz 1.25 1 500 kHz 1.1 1 125 kHz 1.05 0.
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Electrical characteristics Table 18. STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Peripheral current consumption Peripheral APB1 Typical consumption at 25 °C(1) TIM2 0.52 TIM3 0.46 TIM4 0.5 TIM6 0.125 TIM7 0.19 DAC 0.5(2) WWDG 0.13 SPI2 0.2 USART2 0.38 USART3 0.32 I2C1 0.27 I2C2 0.28 HDMI CEC 0.16 GPIO A 0.25 GPIO B 0.12 GPIO C 0.18 GPIO D 0.15 GPIO E 0.15 (3) 1.15 ADC1 Unit mA APB2 SPI1 0.12 USART1 0.27 TIM1 0.63 TIM15 0.33 TIM16 0.26 TIM17 0.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 19. Electrical characteristics High-speed external user clock characteristics Symbol Parameter Conditions Min Typ Max Unit 8 24 MHz fHSE_ext User external clock source frequency(1) 1 VHSEH OSC_IN input pin high level voltage(1) 0.7VDD VDD VHSEL OSC_IN input pin low level voltage(1) VSS 0.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 18. High-speed external clock source AC timing diagram VHSEH 90% VHSEL 10% tr(HSE) tf(HSE) tW(HSE) tW(HSE) t THSE External clock source fHSE_ext OSC _IN IL STM32F10xxx ai14127b Figure 19.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 21. HSE 4-24 MHz oscillator characteristics(1)(2) Symbol fOSC_IN RF Parameter Conditions Oscillator frequency RS = 30 i2 HSE driving current VDD = 3.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Low-speed external clock generated from a crystal/ceramic resonator The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on characterization results obtained with typical external components specified in Table 22.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Figure 21. Typical application with a 32.768 kHz crystal Resonator with integrated capacitors CL1 fLSE OSC32_IN 32.768 KH z resonator RF Bias controlled gain STM32F10xxx OSC32_OU T CL2 ai14129b 5.3.7 Internal clock source characteristics The parameters given in Table 23 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Low-speed internal (LSI) RC oscillator Table 24. LSI oscillator characteristics (1) Symbol fLSI Frequency fLSI(T) tsu(LSI) Parameter (2) Temperature-related frequency drift (3) LSI oscillator startup time (3) LSI oscillator power consumption IDD(LSI) Min Typ Max Unit 30 40 60 kHz 9 % 85 µs 1.2 µA -9 0.65 1. VDD = 3 V, TA = –40 to 105 °C °C unless otherwise specified. 2.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5.3.8 Electrical characteristics PLL characteristics The parameters given in Table 26 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. Table 26. PLL characteristics Value Symbol Parameter Unit Min(1) Typ Max(1) PLL input clock(2) 1 8.
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Electrical characteristics 5.3.9 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Memory characteristics Flash memory The characteristics are given at TA = –40 to 105 °C unless otherwise specified. Table 27. Flash memory characteristics Symbol Parameter Conditions Min(1) Typ Max(1) Unit tprog 16-bit programming time TA–40 to +105 °C 40 52.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5.3.10 Electrical characteristics EMC characteristics Susceptibility tests are performed on a sample basis during device characterization. Functional EMS (Electromagnetic susceptibility) While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the device is stressed by two electromagnetic events until a failure occurs.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electromagnetic Interference (EMI) The electromagnetic field emitted by the device is monitored while a simple application is executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with IEC 61967-2 standard which specifies the test board and the pin loading. Table 30. EMI characteristics Symbol Parameter SEMI 5.3.11 Peak level Monitored frequency band Conditions VDD 3.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5.3.12 Electrical characteristics I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below VSS or above VDD (for standard, 3 V-capable I/O pins) should be avoided during normal product operation.
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Electrical characteristics 5.3.13 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in Table 34 are derived from tests performed under the conditions summarized in Table 8. All I/Os are CMOS and TTL compliant. Table 34. Symbol VIL VIH Vhys Ilkg I/O static characteristics Parameter Conditions Min Typ Max Standard I/O input low level voltage –0.3 0.28*(VDD–2 V)+0.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Figure 22. Standard I/O input characteristics - CMOS port 6)( 6), 6 6 $$ ENT 6 )( #-/3 7)(MIN 7),MAX 6 6 )( $$ QUIREM NDARD RE 6 6), $$ 6 $$ IREMENT 6 ), RD REQU #-/3 STANDA )NPUT RANGE NOT GUARANTEED STA 6$$ 6 AI B Figure 23.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 24. 5 V tolerant I/O input characteristics - CMOS port 6)( 6), 6 6 $$ TS 6 )( UIREMEN ARD REQ 3 STAND #-/ 6 ), 6 $$ T 6 ), 6 $$ REQUIRMEN /3 STANDARD #- 6 )( 6 $$ )NPUT RANGE NOT GUARANTEED 6$$ 6 6$$ AI B Figure 25.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Output voltage levels Unless otherwise specified, the parameters given in Table 35 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. All I/Os are CMOS and TTL compliant. Table 35.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Input/output AC characteristics The definition and values of input/output AC characteristics are given in Figure 26 and Table 36, respectively. Unless otherwise specified, the parameters given in Table 36 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. Table 36.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Figure 26. I/O AC characteristics definition 90% 10% 50% 50% 90% 10% tr(I O)out EXT ERNAL OUTPUT ON 50pF tr(I O)out T Maximum frequency is achieved if (tr + tf) 2/3)T and if the duty cycle is (45-55%) when loaded by 50pF ai14131 5.3.14 NRST pin characteristics The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up resistor, RPU (see Table 34).
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Electrical characteristics 5.3.15 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB TIMx characteristics The parameters given in Table 38 are guaranteed by design. Refer to Section 5.3.12: I/O current injection characteristics for details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output). Table 38.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 39. Electrical characteristics I2C characteristics Standard mode I2C(1) Fast mode I2C(1)(2) Symbol Parameter Unit Min Max Min Max tw(SCLL) SCL clock low time 4.7 1.3 tw(SCLH) SCL clock high time 4.0 0.6 tsu(SDA) SDA setup time 250 100 th(SDA) SDA data hold time 0 0 tr(SDA) tr(SCL) SDA and SCL rise time 1000 300 tf(SDA) tf(SCL) SDA and SCL fall time 300 300 th(STA) Start condition hold time 4.0 0.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 28. I2C bus AC waveforms and measurement circuit(1) 6$$ KΩ 6$$ KΩ Ω Ω )£# BUS 34- & X 3$! 3#, 3TART REPEATED 3TART 3TART TSU 34! 3$! TF 3$! TR 3$! TH 34! TSU 3$! TW 3#,, TSU 34/ 34! 3TOP TH 3$! 3#, TW 3#,( TR 3#, TSU 34/ TF 3#, AI D 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. Table 40. SCL frequency (fPCLK1= 24 MHz, VDD = 3.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics SPI interface characteristics Unless otherwise specified, the parameters given in Table 41 are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 8. Refer to Section 5.3.12: I/O current injection characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 41.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 29. SPI timing diagram - slave mode and CPHA = 0 NSS input tc(SCK) th(NSS) SCK Input tSU(NSS) CPHA= 0 CPOL=0 tw(SCKH) tw(SCKL) CPHA= 0 CPOL=1 tv(SO) ta(SO) MISO OUT P UT tr(SCK) tf(SCK) th(SO) MS B O UT BI T6 OUT tdis(SO) LSB OUT tsu(SI) MOSI I NPUT B I T1 IN M SB IN LSB IN th(SI) ai14134c Figure 30.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Figure 31. SPI timing diagram - master mode(1) High NSS input SCK output SCK output tc(SCK) CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 tsu(MI) MISO INP UT tw(SCKH) tw(SCKL) tr(SCK) tf(SCK) MS BIN BI T6 IN LSB IN th(MI) MOSI OUTUT M SB OUT B I T1 OUT tv(MO) LSB OUT th(MO) ai14136 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD.
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Electrical characteristics Table 42. ADC characteristics Symbol Parameter STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Conditions Min Typ Max Unit VDDA Power supply 2.4 3.6 V VREF+ Positive reference voltage 2.4 VDDA V IVREF Current on the VREF input pin 220(1) µA fADC ADC clock frequency 0.6 12 MHz fS(2) Sampling rate 0.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 43. Electrical characteristics RAIN max for fADC = 12 MHz(1) Ts (cycles) tS (µs) RAIN max (k) 1.5 0.125 0.4 7.5 0.625 5.9 13.5 1.125 11.4 28.5 2.375 25.2 41.5 3.45 37.2 55.5 4.625 50 71.5 5.96 NA 239.5 20 NA 1. Guaranteed by design, not tested in production. Table 44.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 32. ADC accuracy characteristics V V [1LSBIDEAL = REF+ (or DDA depending on package)] 4096 4096 EG (1) Example of an actual transfer curve (2) The ideal transfer curve (3) End point correlation line 4095 4094 4093 (2) ET 7 (1) 6 5 4 ET=Total Unadjusted Error: maximum deviation between the actual and the ideal transfer curves. EO=Offset Error: deviation between the first actual transition and the first ideal one.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Figure 34. Power supply and reference decoupling (VREF+ not connected to VDDA) STM32F10xxx V REF+ 1 µF // 10 nF V DDA 1 µF // 10 nF V SSA/V REF- ai14380b 1. VREF+ is available on 100-pin packages and on TFBGA64 packages. VREF- is available on 100-pin packages only. Figure 35. Power supply and reference decoupling (VREF+ connected to VDDA) STM32F10xxx VREF+/VDDA 1 µF // 10 nF VREF–/VSSA ai14381b 1.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5.3.18 DAC electrical specifications Table 46. DAC characteristics Symbol Parameter Min Typ Max(1) Unit VDDA Analog supply voltage 2.4 3.6 V VREF+ Reference supply voltage 2.4 3.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 46. DAC characteristics (continued) Symbol Offset(3) Gain error(3) Parameter Min Unit ±10 mV Given for the DAC in 12-bit configuration ±3 LSB Given for the DAC in 10-bit at VREF+ = 3.6 V ±12 LSB Given for the DAC in 12-bit at VREF+ = 3.6 V ±0.5 % Given for the DAC in 12bit configuration 4 µs CLOAD  50 pF, RLOAD  5 k 1 MS/s CLOAD  50 pF, RLOAD  5 k 6.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5.3.19 Temperature sensor characteristics Table 47. TS characteristics Symbol TL(1) Parameter Min VSENSE linearity with temperature (1) Typ Max Unit 1 2 °C Average slope 4.0 4.3 4.6 mV/°C V25(1) Voltage at 25°C 1.32 1.41 1.50 V tSTART(2) Startup time 10 µs TS_temp(3)(2) ADC sampling time when reading the temperature 17.1 µs Avg_Slope 4 1.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 6 Package characteristics 6.1 Package mechanical data Package characteristics In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
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Package characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 37. LQFP100, 14 x 14 mm, 100-pin low-profile quad flat package outline(1) Figure 38. Recommended footprint(1)(2) 0.25 mm 0.10 inch GAGE PLANE 75 k 51 D L D1 76 50 0.5 L1 D3 51 75 C 0.3 76 50 16.7 14.3 b E3 E1 E 100 26 1.2 1 100 26 Pin 1 1 identification 25 12.3 25 ccc C 16.7 e A1 ai14906 A2 A SEATING PLANE C 1L_ME 1. Drawing is not to scale. 2. Dimensions are in millimeters. Table 48.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 39. LQFP64 – 10 x 10 mm, 64 pin low-profile quad flat package outline(1) Package characteristics Figure 40. Recommended footprint(1)(2) D 48 33 ccc C D1 33 48 0.3 A A2 D3 49 32 0.5 32 49 12.7 10.3 b L1 10.3 E3 E1 E 64 1.2 L A1 17 K 1 16 64 7.8 17 Pin 1 identification 16 1 c 12.7 5W_ME ai14909 1. Drawing is not to scale. 2. Dimensions are in millimeters. Table 49.
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Package characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 41. TFBGA64 - 8 x 8 active ball array, 5 x 5 mm, 0.5 mm pitch, package outline B D D1 A A e A1 F H F G F E E1 E D C B A e 1 2 3 A1 ball pad corner A3 4 5 6 7 8 Øb (64 balls) A4 A2 Seating C plane Bottom view ME_R8 1. Drawing is not to scale. Table 50. TFBGA64 - 8 x 8 active ball array, 5 x 5 mm, 0.5 mm pitch, package mechanical data inches(1) millimeters Symbol Min Typ A A1 Max Min 1.200 0.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Package characteristics Figure 42. Recommended PCB design rules for pads (0.5 mm pitch BGA) Pitch 0.5 mm D pad 0.27 mm Dsm 0.35 mm typ (depends on the soldermask registration tolerance) Solder paste 0.27 mm aperture diameter Dpad Dsm ai15495 1. Non solder mask defined (NSMD) pads are recommended 2.
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Package characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 43. LQFP48 – 7 x 7 mm, 48-pin low-profile quad flat package outline(1) Figure 44. Recommended footprint(1)(2) Seating plane C A A2 A1 c b ccc 0.50 1.20 0.25 mm Gage plane C 36 D 0.30 25 37 24 D1 k D3 A1 L 25 36 9.70 0.20 7.30 5.80 L1 7.30 24 37 48 13 12 1 1.20 E3 E1 5.80 E 9.70 ai14911b 48 Pin 1 identification 13 1 12 5B_ME 1. Drawing is not to scale. 2. Dimensions are in millimeters.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 6.2 Package characteristics Thermal characteristics The maximum chip junction temperature (TJmax) must never exceed the values given in Table 8: General operating conditions on page 33.
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Package characteristics 6.2.2 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Selecting the product temperature range When ordering the microcontroller, the temperature range is specified in the ordering information scheme shown in Table 53: Ordering information scheme. Each temperature range suffix corresponds to a specific guaranteed ambient temperature at maximum dissipation and, to a specific maximum junction temperature.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Package characteristics Using the values obtained in Table 52 TJmax is calculated as follows: – For LQFP100, 46 °C/W TJmax = 115 °C + (46 °C/W × 134 mW) = 115 °C + 6.2 °C = 121.2 °C This is within the range of the suffix 7 version parts (–40 < TJ < 125 °C). In this case, parts must be ordered at least with the temperature range suffix 7 (see Table 53: Ordering information scheme). Figure 45. LQFP100 PD max vs.
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Ordering information scheme 7 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Ordering information scheme Table 53.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 8 Revision history Revision history Table 54. Document revision history Date Revision 12-Oct-2009 1 Initial release. 2 TFBGA64 package added (see Table 50 and Table 41). Note 5 modified in Table 4: Low & medium-density STM32F100xx pin definitions. IINJ(PIN) modified in Table 6: Current characteristics. Conditions removed from Table 25: Low-power mode wakeup timings. Notes modified in Table 34: I/O static characteristics.
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Revision history STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 54. Document revision history (continued) Date Revision Changes 3 Revision history corrected. Updated Table 6: Current characteristics Values and note updated in Table 16: Typical current consumption in Run mode, code with data processing running from Flash and Table 17: Typical current consumption in Sleep mode, code running from Flash or RAM.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 54. Revision history Document revision history (continued) Date 08-Jun-2012 Revision Changes 7 Updated Table 6: Current characteristics on page 33 Updated Table 39: I2C characteristics on page 63 Corrected note “non-robust “ in Section 5.3.17: 12-bit ADC characteristics on page 67 Updated Section 5.3.13: I/O port characteristics on page 56 Updated Section 2.2.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.