Datasheet

STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics
Doc ID 16455 Rev 7 51/88
5.3.8 PLL characteristics
The parameters given in Ta ble 26 are derived from tests performed under the ambient
temperature and V
DD
supply voltage conditions summarized in Table 8.
Table 26. PLL characteristics
Symbol Parameter
Value
Unit
Min
(1)
Typ Max
(1)
1. Based on device characterization, not tested in production.
f
PLL_IN
PLL input clock
(2)
2. Take care of using the appropriate multiplier factors so as to have PLL input clock values compatible with
the range defined by f
PLL_OUT
.
18.024MHz
PLL input clock duty cycle 40 60 %
f
PLL_OUT
PLL multiplier output clock 16 24 MHz
t
LOCK
PLL lock time 200 µs
Jitter Cycle-to-cycle jitter 300 ps