Datasheet

Operation STLM75
14/40 Doc ID 13296 Rev 12
2.5 Fault tolerance
For both comparator and interrupt modes, the alarm “fault tolerance” setting plays a role in
determining when the OS
output will be activated. Fault tolerance refers to the number of
consecutive times an error condition must be detected before the user is notified. Higher
fault tolerance settings can help eliminate false alarms caused by noise in the system. The
alarm fault tolerance is controlled by the bits (4 and 3) in the configuration register. These
bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in Ta bl e 2. At power-up,
these bits both default to logic '0'.
Note: OS output will be asserted one t
CONV
after fault tolerance is met, provided that the error
condition remains.
2.6 Shutdown mode
For power-sensitive applications, the STLM75 offers a low-power shutdown mode. The SD
bit in the configuration register controls shutdown mode. When SD is changed to logic '1,'
the conversion in progress will be completed and the result stored in the temperature
register, after which the STLM75 will go into a low-power standby state. The OS
output will
be cleared if the thermostat is operating in Interrupt mode and the OS
will remain
unchanged in comparator mode. The 2-wire interface remains operational in shutdown
mode, and writing a '0' to the SD bit returns the STLM75 to normal operation.
Table 2. Fault tolerance setting
FT1 FT0 STLM75 (consecutive faults) Comments
0 0 1 Power-up default
01 2
10 4
11 6