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July 2013 DocID024275 Rev 2 1/29

AN4260

Application note

STEVAL-ISA115V1: 12 V/1.8 W 30 kHz buck with the VIPer06XS

By Mirko Sciortino

Introduction

This document describes a 12 V-0.13 A power supply set in buck topology with the

VIPer06XS, a new offline high voltage converter by STMicroelectronics, specifically

developed for non-isolated SMPS.

The features of the device are:

• 800 V avalanche rugged power section

• PWM operation at 30 kHz with frequency jittering for lower EMI

• Limiting current with adjustable set point

• On-board soft-start

• Safe auto-restart after a fault condition and low standby power consumption

The available protection includes: thermal shutdown with hysteresis, delayed overload

protection and open loop failure protection. All protection is auto-restart mode.

Figure 1. STEVAL- ISA115V1 demonstration board

www.st.com

Summary of content (29 pages)

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AN4260 Application note STEVAL-ISA115V1: 12 V/1.8 W 30 kHz buck with the VIPer06XS By Mirko Sciortino Introduction This document describes a 12 V-0.13 A power supply set in buck topology with the VIPer06XS, a new offline high voltage converter by STMicroelectronics, specifically developed for non-isolated SMPS.
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Contents AN4260 Contents 1 Adapter features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Testing the board . . . .
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AN4260 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. STEVAL- ISA115V1 demonstration board .
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Adapter features 1 AN4260 Adapter features The electrical specifications of the demonstration board are listed in Table 1 Table 1. Electrical specifications Parameter Symbol Value VIN [90 VAC; 265 VAC] Output voltage VOUT 12 V Max. output current IOUT 0.15 A Precision of output regulation ΔVOUT_LF ±5% High frequency output voltage ripple ΔVOUT_HF 50 mV Max.
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AN4260 Circuit description Figure 2.
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Bill of material 3 AN4260 Bill of material Table 2. Bill of material 6/29 Name Value Description C1 4.7 µF, 400 V Electrolytic capacitor Saxon C2 4.7 µF, 400 V Electrolytic capacitor Saxon C3 2.2 µF, 25 V Ceramic capacitor SMD: 0805 CFB n.c Ceramic capacitor SMD: 0805 Cf 100 nF, 50 V Ceramic capacitor SMD: 0805 CC n.
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AN4260 4 Layout Layout Figure 3. Layout (top) AM16630v1 Figure 4.
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Testing the board AN4260 5 Testing the board 5.1 Typical waveforms GND voltage and the current across the inductor L2 (I_L2) in full load condition are shown for the two nominal input voltages in Figure 5 and Figure 6, and for minimum and maximum input voltage in Figure 7 and Figure 8 respectively. Figure 5. Waveforms at VIN = 115 VAC, full load Figure 6. Waveforms at VIN = 230VAC, full load I_L2 I_L2 AM16633v1 AM16632v1 Figure 7. Waveforms at VIN = 80 VAC, full load Figure 8.
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AN4260 Testing the board 5.2 Line/load regulation and output voltage ripple The output voltage of the board has been measured in different lines and load conditions. The results are shown in Figure 9 and Figure 10. Figure 9. Line regulation Figure 10. Load regulation 13 13 12.8 25% 50% 12.4 75% 12.2 12.6 90 12.4 115 VOUT [V] VOUT [V] 12.8 0 12.6 100% 230 12.2 12 265 12 11.8 80 105 130 155 180 VIN[V AC ] 205 230 11.8 255 0 AM16636v1 0.05 IOUT [A] 0.1 0.
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Testing the board 5.3 AN4260 Burst mode and output voltage ripple When the converter is lightly loaded, the COMP pin voltage decreases. As it reaches the shutdown threshold, VCOMPL (1.1 V, typical), the switching is disabled and no more energy is transferred to the secondary side. So, the output voltage decreases and the regulation loop makes the COMP pin voltage increase again. As it rises 40 mV above the VCOMPL threshold, the normal switching operation is resumed.
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AN4260 Testing the board Figure 15. Active mode efficiency vs. VIN and comparison with CoC4 and DOE 81 79 77 eff [%] 75 73 DOE limit 71 69 67 CoC4 limit 115 230 av @ 115Vac av @ 230Vac 65 0.2 0.4 0.6 0.8 Iout [% I OUT ] 1 AM16642v1 5.5 Light load performance The input power of the converter has been measured in no load condition for different input voltages and the results are reported in Table 3. Table 3.
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Testing the board AN4260 Table 4. Energy consumption criteria for no load Nameplate output power (Pno) Maximum power in no load for AC-DC EPS 0 to ≤ 50 W < 0.3 W > 50 W < 250 W < 0.5 W The power consumption of the presented board is about six times lower than the limit fixed by version 4 of the Code of Conduct.
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AN4260 Testing the board Figure 17. Efficiency @ PIN = 1 W 90 85 80 eff [%] 75 70 65 60 55 50 80 110 140 170 200 230 260 VIN [V AC] AM16644v1 Another requirement for light load performance (EuP lot 6) is that the input power should be less than 500 mW when the converter is loaded 250 mW. The demonstration board satisfies this requirement, as shown in Figure 18. Figure 18. PIN @ POUT = 0.25 W 0.5 PIN [W] 0.45 0.4 0.35 0.3 0.
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Functional check AN4260 6 Functional check 6.1 Startup The startup phase at maximum load is shown in Figure 19 and Figure 21 at both nominal input voltages (115 VAC and 230 VAC). Figure 19. Startup at VIN = 115 VAC, full load Figure 20. Startup at VIN = 115 VAC, full load, zoom I_L2 AM16646v1 AM16645v1 Figure 21. Startup at VIN = 230 VAC, full load Figure 22. Startup at VIN = 230 VAC, full load, zoom I_L2 AM16647v1 6.
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AN4260 Functional check After the short removal, the IC resumes working normally. If the short is removed during tSS or tOVL, before the protection tripping, the counter is decremented on a cycle-by-cycle basis down to zero and the protection is not tripped. If the short-circuit is removed during tRESTART, the IC must wait for the tRESTART period to elapse before switching is resumed Figure 26. Figure 23. Output short-circuit applied: OLP tripping Figure 24.
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Functional check AN4260 The protection acts in auto-restart mode with tRESTART = 1 sec (Figure 28). As the fault is removed, normal operation is restored after the last tRESTART interval has been completed (Figure 30). Figure 27. Feedback loop failure protection: tripping Figure 28. Feedback loop failure protection: steady-state Fault is applied here tRESTARTtRESTART tRESTART I_L2 I_L2 AM16654v1 AM16653v1 Figure 29. Feedback loop failure protection: steady-state zoom Figure 30.
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AN4260 Feedback loop calculation guidelines 7 Feedback loop calculation guidelines 7.1 Transfer function The set PWM modulator + power stage is indicated with G1(f), while C(f) is the "controller", the network in charge to ensure the stability of the system. Figure 31.
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Feedback loop calculation guidelines AN4260 Equation 5 V IN + Vγ Ipk ⋅ -------α = ----------------------------( VOUT + Vγ ) 2 Equation 6 V IN + Vγ Ipk β = ------------------------------⋅ -------- ⋅ ∂ ( V OU T + Vγ ) 2 2 Equation 7 Ipk ( V OU T + Vγ ) ⋅ ( V IN + Vγ ) ⋅ -------- ⋅ R O UT α ⋅ R O UT 2 G10 = ----------------------------- = ----------------------------------------------------------------------------------------------1 + β ⋅ R OU T Ipk 2 ( V O UT + Vγ ) ⋅ ( V IN + Vγ ) ⋅ --------∂ ⋅ R O UT 2
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AN4260 7.2 Feedback loop calculation guidelines Compensation procedure for a DCM buck The first step is to choose the pole and zero of the compensator and the crossing frequency. In this case C(f) has only a zero (fzc) and a pole at the origin, thus a possible setting is: • fzc=k*fp • fcross = fcross_sel_≤ fsw /10 where k is chosen arbitrarily.
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Thermal measurements AN4260 and the compensator becomes: Equation 16 f  1 + ------------------- fzc_act C 0_act  G_act(f) = --------------- ⋅ ----------------------------------H CO MP j⋅2⋅π⋅f At this point the Bode diagram of G1(f)*C_act(f) should be plotted, and check if the phase margin for the stability is maintained. 8 Thermal measurements A thermal analysis of the demonstration board in full load condition at TAMB = 25 °C has been performed using an IR camera.
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AN4260 Thermal measurements Figure 33. Thermal measurement @ VIN = 115 VAC, full load (130 mA) Rbl = 8.2 kohm AM16657v1 Figure 34. Thermal measurement @ VIN = 230 VAC, full load (130 mA) Rbl = 8.
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Thermal measurements AN4260 Figure 35. Thermal measurement @ VIN = 265 VAC, full load (130 mA) Rbl = 8.
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AN4260 9 EMI measurements EMI measurements A pre-compliant test of the EN55022 (Class B) european normative has been performed using an EMC analyzer and an LISN. The average EMC measurements at 115 VAC/full load and 230 VAC/full load have been performed and the results are shown in Figure 36 and Figure 37. Figure 36. Average measurement at full load, 115 VAC AM16660v1 Figure 37.
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Test equipment and measurement of efficiency and light load performance Appendix A AN4260 Test equipment and measurement of efficiency and light load performance The converter input power has been measured using a wattmeter. The wattmeter measures simultaneously the converter input current (using its internal ammeter) and voltage (using its internal voltmeter). The wattmeter is a digital instrument so it samples the current and voltage and converts them to digital forms.
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AN4260 Test equipment and measurement of efficiency and light load performance Figure 39. Switch in position 1 - setting for standby measurements Wattmeter Ammeter AC SOURCE ~ A + U.U.T. AC INPUT V - UUT Voltmeter AM16663v1 In the case of high UUT input current (i.e. for measurements in heavy load conditions), the voltage drop can be relevant compared to the UUT real input voltage.
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Test equipment and measurement of efficiency and light load performance AN4260 After this warm-up period, the AC input power is monitored for a period of 5 minutes to assess the stability of the UUT. If the power level does not drift by more than 5% from the maximum value observed, the UUT can be considered stable and the measurements can be recorded at the end of the 5-minute period.
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AN4260 10 References References [1] Code of Conduct on energy efficiency of external power supplies, version 4. [2] VIPER06 datasheet.
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Revision history AN4260 Revision history Table 5. Document revision history 28/29 Date Revision Changes 30-May-2013 1 Initial release. 25-Jul-2013 2 Updated: Figure 5, Figure 6, Figure 7, Figure 8, Figure 19, Figure 21, Figure 23, Figure 24, Figure 25, Figure 26, Figure 27, Figure 28, Figure 29 and Figure 30.
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AN4260 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.