Datasheet

HVLED815PF Device description
Doc ID 023409 Rev 4 25/36
Equation 13
Finally, the Rdmg resistor can be calculated as follows:
Equation 14
In this case the peak drain current does not depend on input voltage anymore, and as a
consequence the average output current I
OUT
do not depend from the V
IN
input voltage.
When high power factor is implemented (see
Section 4.11 ), the feed-forward current has to
be minimized because the line regulation is assured by the external offset circuitry (see
Figure 1: Application circuit for high power factor LED driver - single range input ).
The maximum value is limited by the minimum Idmg internal current needed to guarantee
the correct functionality of the internal circuitry:
Equation 15
4.8 Burst-mode operation at no load or very light load
When the voltage at the COMP pin falls 65 mV is below the internally fixed threshold
V
COMPBM
, the IC is disabled with the MOSFET kept in OFF state and its consumption
reduced at a lower value to minimize VCC capacitor discharge.
In this condition the converter operates in burst-mode (one pulse train every T
START
=500
µs), with minimum energy transfer.
As a result of the energy delivery stop, the output voltage decreases: after 500 µs the
controller switches-on the MOSFET again and the sampled voltage on the DMG pin is
compared with the internal reference V
REF
. If the voltage on the EA output, as a result of the
comparison, exceeds the VCOMPL threshold, the device restarts switching, otherwise it
stays OFF for another 500 µs period.
In this way the converter will work in burst-mode with a nearly constant peak current defined
by the internal disable level. A load decrease will then cause a frequency reduction, which
can go down even to few hundred hertz, thus minimizing all frequency-related losses and
making it easier to comply with energy saving regulations. This kind of operation, shown in
the timing diagrams of
Figure 20 along with the others previously described, is noise-free
since the peak current is low.