Datasheet

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This is information on a product in full production.

January 2013 Doc ID 019056 Rev 5 1/20

STEF12

Electronic fuse for 12 V line

Datasheet − production data

Features

■ Continuous current (typ): 3.6 A

■ N-channel on-resistance (typ): 53 mΩ

■ Enable/Fault functions

■ Output clamp voltage (typ):15 V

■ Undervoltage lockout

■ Short-circuit limit

■ Overload current limit

■ Controlled output voltage ramp

■ Thermal latch (typ): 165 °C

■ Uses tiny capacitors

■ Operating junction temp. - 40 °C to 125 °C

■ Available in DFN10 (3x3 mm) package

Applications

■ Hard disk drives

■ Solid state drives (SSD)

■ Hard disk and SSD arrays

■ Set-top boxes

■ DVD and Blu-ray disc drivers

Description

The STEF12 is an integrated electronic fuse

optimized for monitoring output current and input

voltage. Connected in series to a 12 V rail, it is

capable of protecting the electronic circuitry on its

output from overcurrent and overvoltage. The

device has a controlled delay and turn-on time.

When an overload condition occurs, the STEF12

limits the output current to a predefined safe

value. If the anomalous overload condition

persists it goes into an open state, disconnecting

the load from the power supply. If a continuous

short-circuit is present on the board, when power

is re-applied the E-fuse initially limits the output

current to a safe value and then again goes into

an open state. The device is equipped with a

thermal protection circuit. The intervention of the

thermal protection is signalled to the board

monitoring circuits through a signal on the Fault

pin. Unlike the mechanical fuses, which must be

physically replaced after a single event, the E-

fuse does not degrade in its performance after

short-circuit/thermal protection interventions and

it is reset either by recycling the supply voltage or

using the Enable pin. The companion chip for the

5 V power rails is also available with part number

STEF05.

DFN10 (3x3 mm)

Table 1. Device summary

Order code Package Packaging

STEF12PUR DFN10 (3x3 mm) Tape and reel

www.st.com

Summary of content (20 pages)

PAGE 1
STEF12 Electronic fuse for 12 V line Datasheet − production data Features ■ Continuous current (typ): 3.6 A ■ N-channel on-resistance (typ): 53 mΩ ■ Enable/Fault functions ■ Output clamp voltage (typ):15 V ■ Undervoltage lockout ■ Short-circuit limit ■ Overload current limit ■ Controlled output voltage ramp ■ Thermal latch (typ): 165 °C ■ Uses tiny capacitors ■ Operating junction temp.
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Contents STEF12 Contents 1 Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Typical application . . . . . . . . . . . . .
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STEF12 1 Device block diagram Device block diagram Figure 1.
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Pin configuration 2 STEF12 Pin configuration Figure 2. Pin configuration (top view) GND dv/dt En/fault I-Limit N/C Source Source Source Source Source VCC AM09880v1 Table 2. Pin description Pin n° Symbol 1 GND Ground pin dv/dt The internal dv/dt circuit controls the slew rate of the output voltage at turn-on. The internal capacitor allows a ramp-up time of around 1ms. An external capacitor can be added to this pin to increase the ramp time.
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STEF12 Maximum ratings 3 Maximum ratings Table 3. Absolute maximum ratings Symbol Parameter VCC Value Positive power supply voltage (steady state) -0.3 to 18 Positive power supply voltage (max 100ms) -0.3 to 25 Unit V VOUT/source (max 100ms) -0.3 to Vcc+0.3 V I-Limit (max 100ms) -0.3 to 25 V -0.3 to 7 V -0.
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Electrical characteristics 4 STEF12 Electrical characteristics VCC = 12 V, VEN = 3.3 V, CI = 10 µF, CO = 47 µF, TJ = 25 °C (unless otherwise specified). Table 6. Electrical characteristics for STEF12 Symbol Parameter Test Conditions Min. Typ. Max. Unit Under/Overvoltage protection VClamp Output clamping voltage VCC = 18 V 13.8 15 16.2 V VUVLO Undervoltage lockout Turn-on, voltage rising 7.7 8.5 9.3 V VHyst UVLO hysteresis 0.
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STEF12 Table 6. Electrical characteristics Electrical characteristics for STEF12 (continued) Symbol Vmin Parameter Test Conditions Min. Typ. Minimum operating voltage Max. Unit 7.6 V Thermal latch TSD (1) Shutdown temperature 165 °C 1. Pulse test: Pulse width = 300 µs, Duty cycle = 2% 2.
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Typical application 5 STEF12 Typical application Figure 3. Application circuit Figure 4. Typical HDD application circuit AM09869v1 5.1 Operating modes 5.1.1 Turn-on When the input voltage is applied, the Enable/Fault pin goes up to the high state, enabling the internal control circuitry. After an initial delay time of typically 350 µs, the output voltage is supplied with a slope defined by the internal dv/dt circuitry.
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STEF12 5.1.2 Typical application Normal operating condition The STEF12 E-fuse behaves like a mechanical fuse, buffering the circuitry on its output with the same voltage shown at its input, with a small voltage fall due to the N-channel MOSFET RDSOn. 5.1.3 Output voltage clamp This internal protection circuit clamps the output voltage to a maximum safe value, typically 15 V, if the input voltage exceeds this threshold. 5.1.
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Typical application STEF12 The addition of an external Cdv/dt influences also the initial delay time, defined as the time between the Enable signal going high and the start of the VOUT slope (Figure 5). The contribution of the external capacitor to this time interval can be estimated by using the following theoretical formula: Equation 3 delay time = 350 × 10 – 6 + 11.3 × 10 6 × C dvdt Figure 5.
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STEF12 Typical application Figure 6.
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Typical performance characteristics 6 STEF12 Typical performance characteristics The following plots are referred to the typical application circuit and, unless otherwise noted, at TA = 25 °C. Figure 7. Clamping voltage vs. temperature Figure 8. UVLO voltage vs. temperature AM09883v1 16.5 AM09884v1 9.5 VCC = 18 V VCC = from 0 to 12 V, RLIMIT = 15 Ω 9.3 16 8.9 15.5 UVLO Voltage (V) Output Voltage (V) 9.1 15 14.5 8.7 8.5 8.3 8.1 7.9 14 7.7 7.5 13.
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STEF12 Typical performance characteristics Figure 13. Current limit vs. RLimit Figure 14. Thermal latch delay vs. power AM09890v1 800 AM09889v1 9.00 VCC = 12 V, T = 25 °C 8.00 Thermal Action Time (ms) Limit & Short Current (A) 7.00 ILIM 6.00 ISHORT 5.00 4.00 3.00 2.00 T=25 °C T=55 °C 80 T=85 °C 8 1.00 0.00 0 10 20 30 40 50 60 70 80 0.8 0 External Sensing Resistor (Ω) 10 20 30 40 50 60 Power (W) Figure 15. VOUT ramp-up vs. Enable Figure 16.
PAGE 14
Typical performance characteristics STEF12 Figure 19. Thermal latch from 2 A load to short-circuit Figure 20.
PAGE 15
STEF12 7 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 7. DFN10L (3x3 mm.) mechanical data mm. Dim. A Min. Typ. Max. 0.80 0.90 1.00 0.02 0.05 0.65 0.80 A1 A2 0.55 A3 0.20 b 0.18 0.25 0.30 D 2.
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Package mechanical data STEF12 Figure 21.
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STEF12 Package mechanical data Tape and reel QFNxx/DFNxx (3x3 mm) mechanical data mm. inch. Dim. Min. Typ. A Max. Min. Typ. 330 13.2 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 0.504 0.519 18.4 0.724 Ao 3.3 0.130 Bo 3.3 0.130 Ko 1.1 0.043 Po 4 0.157 P 8 0.315 Doc ID 019056 Rev 5 Max.
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Package mechanical data STEF12 Figure 22. DFN10L footprint - recommended data (dimensions in mm.
PAGE 19
STEF12 Revision history 8 Revision history Table 8. Document revision history Date Revision Changes 15-Jul-2011 1 Initial release. 08-Aug-2011 2 Modified definition for Top in Table 3: Absolute maximum ratings. 14-Dec-2011 3 Removed Vdv/dt and Idv/dt rows from dv/dt circuit Table 6 on page 6. 06-Mar-2012 4 Updated: package mechanical data Table 7 on page 15, Figure 21 on page 16 and Figure 22 on page 18.
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STEF12 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.