Datasheet
STCS2A Timing
7/18
5 Timing
Figure 3. PWM and output current timing
PWM
10%
90%
T
D
Trise
T
D
Tfall
Current
PWM
10%
90%
T
D
Trise
T
D
Tfall
Current
Figure 4. Block diagram
High Voltage
45 V
Preregulator
3.3 V
Enable
Input
PWM
Input
Bandgap
1.23 V
+
-
+
-
Driver
Disc
comp
DISC
DRAIN
SOURCE
75 mV
Enable,
PWM &
Slope controll
Logic
Shutdown
all blocks
Thermal
Shutdown
Low Voltage 3.3 V
H.V.
45 V
100 mV
Comp
Logic
V
CC
EN
PWM
GND
Slope
Control
FB
SLOPE
High Voltage
45 V
Preregulator
3.3 V
Enable
Input
PWM
Input
Bandgap
1.23 V
Bandgap
1.23 V
+
-
+
-
+
-
+
-
Driver
Disc
comp
DISC
DRAIN
SOURCE
75 mV
Enable,
PWM &
Slope controll
Logic
Shutdown
all blocks
Thermal
Shutdown
Thermal
Shutdown
Low Voltage 3.3 V
H.V.
45 V
100 mV100 mV
Comp
Logic
V
CC
EN
PWMPWM
GNDGND
Slope
Control
FB
SLOPE