Datasheet

STCN75 Functional description
Doc ID 13307 Rev 9 23/36
3.6 WRITE mode
In this mode the master transmitter transmits to the STCN75 slave receiver. Bus protocol is
shown in Figure 11. Following the START condition and slave address, a logic '0' (R/W
= 0)
is placed on the bus and indicates to the addressed device that word address will follow and
is to be written to the on-chip address pointer.
These modes are shown in the WRITE mode typical timing diagrams (see Figure 11, and
Figure 12, and Figure 13 on page 24).
Figure 11. Typical pointer set followed by an immediate READ from the
configuration register
Figure 12. Configuration register WRITE
AI12230
1919
Repeat
Start
by
Master
ACK
by
STCN75
No ACK
by
STCN75
Stop
Cond.
by
Master
1 0 0 1 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
R/W
Address Byte Data Byte
1199
1
Start
by
Master
Address Byte
Pointer Byte
ACK
by
STCN75
ACK
by
STCN75
0 0 1 A2 A1 A0 R/W 0 0 0 0 0 0 D1 D0
AI12231
119919
1
Start
by
Master
Address Byte
Pointer Byte
ACK
by
STCN75
ACK
by
STCN75
ACK
by
STCN75
Stop
Cond.
by
Master
001A2A1A0R/W 000000 000D4D3D2D1D0D1 D0
Configuration Byte