Datasheet

Functional description STCN75
22/36 Doc ID 13307 Rev 9
Figure 8. Typical 2-byte READ from preset pointer location (e.g. temp - T
OS
, T
HYS
)
Figure 9. Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp)
Figure 10. Typical 1-byte READ from the cofiguration register with preset pointer
AI12227
119199
1
Start
by
Master
Address Byte
Most Significant Data Byte Least Significant Data Byte
ACK
by
STCN75
ACK
by
Master
No ACK
by
Master
Stop
Cond.
by
Master
0 0 1 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
AI12228
119199
1
Repeat
Start
by
Master
Address Byte
Most Significant Data Byte Least Significant Data Byte
ACK
by
STCN75
ACK
by
Master
No ACK
by
Master
Stop
Cond.
by
Master
0 0 1 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
1199
1
Start
by
Master
Address Byte
Pointer Byte
ACK
by
STCN75
ACK
by
STCN75
0 0 1 A2 A1 A0 R/W 0 0 0 0 0 0 D1 D0
AI12229
1199
1
Start
by
Master
Address Byte
Data Byte
ACK
by
STCN75
No ACK
by
Master
Stop
Cond.
by
Master
0 0 1 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0