Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsLinear ICsLinear IC - Audio amplifier 1-channel (mono) or 2-channel (stereo) Class D PowerSO 36

1/10

STA508

February 2006

1FEATURES

■ MULTIPOWER BCD TECHNOLOGY

■ MINIMUM INPUT OUTPUT PULSE WIDTH

DISTORTION

■ 200mΩ R

dsON

COMPLEMENTARY DMOS

OUTPUT STAGE

■ CMOS COMPATIBLE LOGIC INPUTS

■ THERMAL PROTECTION

■ THERMAL WARNING OUTPUT

■ UNDER VOLTAGE PROTECTION

2 DESCRIPTION

STA508 is a monolithic quad half bridge stage in Mul-

tipower BCD Technology. The device can be used as

dual bridge or reconfigured, by connecting CONFIG

pin to Vdd pin, as single bridge with double current

capability, and as half bridge (Binary mode) with half

current capability.

The device is particularly designed to make the out-

put stage of a stereo All-Digital High Efficiency

(DDX™) amplifier capable to deliver 80 + 80W @

THD = 10% at V

35V output power on 8

Ω

load.

In single BTL configuration is also capable to deliver

a peak of 160W @THD = 10% at V

= 35V on 4

Ω

load. The input pins have threshold proportional to V

pin voltage.

40V 4.5A QUAD POWER HALF BRIDGE

Figure 2. Block Diagram

L18 22µH

L19 22µH

C30

1µF

C20

100nF

C99

100nF

C101

100nF

C107

100nF

C106

100nF

C23

470nF

C55

1000µF

C21

100nF

C58

100nF

C58

100nF

R57

10K

R59

10K

R63

R98

R100

C53

100nF

C60

100nF

C31

1µF

C52

330pF

R104

C109

330pF

IN1A

CONFIG

PWRDNPWRDN

FAULT

TRI-STATE

TH_WAR

+3.3V

IN1B

SIGN

GND-Reg

GND-Clean

IN2A

IN1B

IN2A

IN2B

PROTECTIONS

LOGIC

REGULATORS

OUT1A

GND1A

OUT1A

OUT1B

GND1B

OUT1B

L113 22µH

L112 22µH

C32

1µF

C108

470nF

C33

1µF

M17

M15

M16

M14

OUT2A

GND2A

OUT2A

OUT2B

GND2B

D00AU1148B

OUT2B

GNDSUB

IN2B

C110

100nF

C111

100nF

R103

R102

8Ω

Rev. 4

gure 1.

age

Table 1. Order Codes

Part Number Package

STA508 PowerSO36

PowerSO36

Summary of content (10 pages)

PAGE 1
STA508 40V 4.5A QUAD POWER HALF BRIDGE 1 ■ ■ FEATURES Figure 1. Package MULTIPOWER BCD TECHNOLOGY MINIMUM INPUT OUTPUT PULSE WIDTH DISTORTION ■ 200mΩ RdsON COMPLEMENTARY DMOS OUTPUT STAGE ■ CMOS COMPATIBLE LOGIC INPUTS ■ THERMAL PROTECTION ■ THERMAL WARNING OUTPUT ■ UNDER VOLTAGE PROTECTION 2 PowerSO36 Table 1.
PAGE 2
STA508 Table 2.
PAGE 3
STA508 Table 3. FUNCTIONAL PIN STATUS PIN NAME Logical value IC -STATUS FAULT 0 Fault detected (Short circuit, or Thermal ..) FAULT (*) 1 Normal Operation TRI-STATE 0 All powers in Hi-Z state TRI-STATE 1 Normal operation PWRDN 0 Low absorpion PWRDN 1 Normal operation THWAR 0 Temperature of the IC =130°C THWAR(*) 1 Normal operation CONFIG 0 Normal Operation CONFIG(**) 1 OUT1A = OUT1B ; OUT2A=OUT2B (IF IN1A = IN1B; IN2A = IN2B) (*) : The pin is open collector.
PAGE 4
STA508 Table 5. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage (Pin 4,7,12,15) 40 V Vmax Maximum Voltage on pins 23 to 32 5.5 V Ptot Power Dissipation (Tcase = 70°C) 50 W Top Operating Temperature Range -40 to 90 °C Storage and Junction Temperature -40 to 150 °C Tstg, Tj Table 6. ELECTRICAL CHARACTERISTCS (VL = 3.3V; VCC = 30V; Tamb = 25°C ; fsw =384 unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max.
PAGE 5
STA508 Table 6. ELECTRICAL CHARACTERISTCS (continued) Symbol Parameter VH High logical state voltage VH (pin PWRDN, TRISTATE) (note 1) VL = 3.3V IVCCPWRDN Supply CURRENT from Vcc in Power Down PWRDN = 0 IFAULT Output Current pins FAULT -TH-WARN when FAULT CONDITIONS IVCC-hiz IVCC IVCC-q VUV tpw-min Test conditions Min. Typ. Max. Unit 1.7 V 3 mA Vpin = 3.
PAGE 6
STA508 Figure 4. Test Circuit. OUTxY Vcc (3/4)Vcc Low current dead time = MAX(DTr,DTf) (1/2)Vcc (1/4)Vcc +Vcc t DTr Duty cycle = 50% DTf M58 OUTxY INxY R 8Ω M57 V67 = vdc = Vcc/2 + - gnd D03AU1458 Figure 5. +VCC Q1 Q2 OUTxA INxA OUTxB Q3 INxB Q4 GND D00AU1134 Figure 6.
PAGE 7
STA508 Figure 7. Typical Single BTL Configuration VL +3.3V GND-Clean GND-Reg 100nF X7R 10K 23 18 N.C. 10µH 100nF VDD VDD CONFIG TH_WAR TH_WAR PWRDN nPWRDN FAULT 10K IN1A IN1B IN1A IN2A IN2B IN1B VSS VSS 100nF X7R 16 20 11 10 21 VCCSIGN 100nF X7R VCCSIGN Add. GNDSUB OUT1A 100nF FILM OUT1A OUT1B 9 24 OUT2A 6.
PAGE 8
STA508 Figure 9. Power SO36 (SLUG UP) Mechanical Data & Package Dimensions DIM. A A2 A4 A5 a1 b c D D1 D2 E E1 E2 E3 E4 e e3 G H h L N s MIN. 3.25 3.1 0.8 mm TYP. MAX. 3.43 3.2 1 MIN. 0.128 0.122 0.031 -0.040 0.38 0.32 16 9.8 0.0011 0.008 0.009 0.622 0.37 14.5 11.1 2.9 6.2 3.2 0.547 0.429 0.2 0.030 0.22 0.23 15.8 9.4 5.8 2.9 0.8 OUTLINE AND MECHANICAL DATA -0.0015 0.015 0.012 0.630 0.38 0.039 0.57 0.437 0.114 0.244 1.259 0.228 0.114 0.65 11.05 0 15.5 MAX. 0.135 0.126 0.039 0.008 1 13.9 10.
PAGE 9
STA508 Table 9. Revision History Date Revision Description of Changes September 1994 1 First Issue June 2004 2 Note 2: See relevant Application Note AN1994 November 2004 3 Changed Vcc from 9 min to 10 min February 2006 4 Changed Top value on Table 5.
PAGE 10
STA508 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.