Datasheet

Register description STA333W
30/49 Doc ID 13365 Rev 2
Zero-crossing volume enable
The ZCE bit enables zero-crossing volume adjustments. When volume is adjusted on digital
zero-crossings no clicks will be audible.
Soft volume update enable
6.1.6 Configuration register F (addr 0x05)
Invalid Input detect mute enable
Setting the IDE bit enables this function, which looks at the input I
2
S data and will
automatically mute if the signals are perceived as invalid.
Binary output mode clock loss detection
Detects loss of input MCLK in binary mode and outputs 50% of the duty cycle.
Table 31. Zero-crossing volume enable
Bit R/W RST Name Description
6R/W1ZCE
1: volume adjustments will only occur at digital
zero-crossings
0: volume adjustments will occur immediately
Table 32. Zero-crossing volume enable
Bit R/W RST Name Description
7R/W1SVE
1: volume adjustments ramp according to SVR
settings
0: volume adjustments will occur immediately
D7 D6 D5 D4 D3 D2 D1 D0
EAPD PWDN ECLE LDTE BCLE IDE Reserved
0101110 0
Table 33. Invalid input detect mute enable
Bit R/W RST Name Description
2 R/W 1 IDE 1: enables the automatic invalid input detect mute
Table 34. Binary output mode clock loss detection
Bit R/W RST Name Description
3 R/W 1 BCLE Binary output mode clock loss detection enable