Datasheet

ST8024L Pin configuration
Doc ID 17709 Rev 5 7/35
3 Pin configuration
Figure 2. Pin connections
Table 2. Pin description
Symbol Name and function
SO-28/
TSSOP-28
TSSOP-20
CLKDIV1
Control of CLK frequency
(internal 11 kΩ
pull-up resistor connected to V
DD
)
1N. A.
CLKDIV2
Control of CLK frequency
(internal 11 kΩ
pull-down resistor connected to GND)
2N. A.
5V/3V
5 V or 3 V V
CC
selection for communication with the smartcard. Logic high
selects 5 V operation and logic low selects 3 V operation (for ST8024LACDR,
ST8024LACTR, and ST8024LTR: if the 1.8V pin is logic high, the 5V/3
V pin is
a “don't care”). See Tabl e 2 3 for a description of the V
CC
selection settings.
31
PGND Power ground for step-up converter 4 2
C1+ External capacitor step-up converter 5 3
V
DDP
Power supply for step-up converter 6 4
C1– External capacitor step-up converter 7 5
V
UP
Output of step-up converter 8 6
PRES
Card presence input (active low) - bonding option 9 N. A.
PRES Card presence input (active high) 10 7
I/O
Data line to and from card (C7)
(internal 11 kΩ
pull-up resistor connected to V
CC
)
11 8