Datasheet

ST8024L Functional description
Doc ID 17709 Rev 5 21/35
6.4 I/O transceivers
The three data lines I/O, AUX1, and AUX2 are identical. The idle state is realized by both I/O
and I/OUC lines being pulled high via an 11 kΩ resistor (I/O to V
CC
and I/OUC to V
DD
). Pin
I/O is referenced to V
CC
, and pin I/OUC to V
DD
, therefore allowing operation when V
CC
is not
equal to V
DD
. The first side of the transceiver to receive a falling edge becomes the master.
An anti-latch circuit disables the detection of falling edges on the line of the other side, which
then becomes a slave. After a time delay t
d(edge)
, an N transistor on the slave side is turned
on, therefore transmitting the logic 0 present on the master side. When the master side
returns to logic 1, a P transistor on the slave side is turned on during the time delay t
PU
and
then both sides return to their idle states. This active pull-up feature ensures fast low to high
transitions; it is able to deliver more than 1 mA, at an output voltage of up to 0.9 V
CC
, into an
80 pF load. At the end of the active pull-up pulse, the output voltage depends only on the
internal pull-up resistor and the load current. The current to and from the card I/O lines is
limited internally to 15 mA and the maximum frequency on these lines is 1 MHz.
6.5 Inactive mode
After a power-on reset, the circuit enters inactive mode. A minimum number of circuits are
active while waiting for the microcontroller to start a session:
– All card contacts are inactive (approximately 200 Ω to GND)
– Pins I/OUC, AUX1UC, and AUX2UC are in the high impedance state (11 kΩ pull-up
resistor to V
DD
). Applies only to SO-28 and TSSOP-28 packages.
– Voltage generators are stopped
– XTAL oscillator is running
– Voltage supervisor is active
– The internal oscillator is running at its low frequency.
6.6 Activation sequence
After power-on and after the internal pulse width delay, the system microcontroller can
check the presence of a card using the signals OFF
and CMDVCC, as shown in Table 2 2.
If the card is in the reader (this is the case if PRES
or PRES is active), the system
microcontroller can start a card session by pulling CMDVCC
low. The following sequence
then occurs (see Figure 6):
1. CMDVCC
is pulled low and the internal oscillator changes to its high frequency (t
0
).
2. The step-up converter is started (between t
0
and t
1
).
3. V
CC
rises from 0 to 5 V (or 1.8 V, 3 V) with a controlled slope (t
2
= t
1
+ 1.5 x T) where
T is 64 times the period of the internal oscillator (approximately 25 µs).
4. I/O, AUX1, and AUX2 are enabled (t
3
= t
1
+ 4T) (these were pulled low until this
moment).
5. CLK is applied to the C3 contact of the card reader (t
4
).
6. RST is enabled (t
5
= t
1
+ 7T).