Datasheet

ST8024L Electrical characteristics
Doc ID 17709 Rev 5 15/35
Table 15. Clock output to card reader (pin CLK)
Symbol Parameter
(1)
Test conditions Min. Typ. Max. Unit
V
O(inactive)
Output voltage in inactive
mode
I
O(inactive)
= 1 mA 0 - 0.3
V
No load 0 - 0.1
I
O(inactive)
Output current
CLK inactive mode;
pin grounded
0-–1mA
V
OL
Low level output voltage
I
OL
= 200 µA 0 - 0.3
V
I
OL
= 70 mA (current limit) V
CC
-0.4 - V
CC
V
OH
High level output voltage
I
OH
= –200 µA 0.9 V
CC
-V
CC
V
I
OH
= –70 mA (current limit) 0 - 0.4
t
R,
t
F
Rise and fall time C
L
= 30 pF
(2)
-16ns
δ Duty factor (except for f
XTAL
)C
L
= 30 pF
(2)
45 - 55 %
S
R
Slew rate Slew up or down; C
L
= 30 pF 0.2 - V/ns
1. V
DD
= 3.3 V, V
DDP
= 5 V, f
XTAL
= 10 MHz, unless otherwise noted. Typical values are at T
A
= 25 °C.
2. Transition time and duty factor definitions are shown in Figure 3; d = t
1
/(t
1
+ t
2
).
Table 16. Control inputs (pins CLKDIV1, CLKDIV2, CMDVCC, RSTIN, 5V/3V and PORADJ/1.8V)
Symbol Parameter
(1)
Test conditions Min. Typ. Max. Unit
V
IL
Low level input voltage –0.3 0.3 V
DD
V
V
IH
High level input voltage 0.7 V
DD
V
DD
V
|I
LIH
|
High level input leakage
current
V
IH
= V
DD
1µA
V
IH
= V
DD
, 1.8V and CLKDIV2
pins with internal 11 kΩ pull-
down resistor
800 µA
|I
LIL
|
Low level input leakage
current
V
IL
= 0 -1 µA
V
IL
= 0, CLKDIV1 pin with
internal 11 kΩ pull-up resistor
-800 µA
R
PD
Internal pull-down resistor to
GND
Pull-down resistor to GND (1.8V
and CLKDIV2 pins)
91113kΩ
R
PU
Internal pull-up resistor to
V
DD
Pull-up resistor to V
DD
(CLKDIV1 pin)
91113kΩ
1. V
DD
= 3.3 V, V
DDP
= 5 V, f
XTAL
= 10 MHz, unless otherwise noted. Typical values are at T
A
= 25 °C.
Pin CMDVCC is active low; pin RSTIN is active high; for CLKDIV1 and CLKDIV2 functions (see Table 21).