Datasheet

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March 2009 Rev 8 1/31

ST8024

Smartcard interface

Features

■ Designed to be compatible with the NDS

conditional access system

■ IC card interface

■ 3 or 5 V supply for the IC (V

and GND)

■ Three specifically protected half-duplex bi-

directional buffered I/O lines to card contacts

C4, C7 and C8

■ DC-DC converter for V

generation

separately powered from a 5 V ± 20% supply

DDP

and PGND)

■ 3 or 5 V ± 5 % regulated card supply voltage

) with appropriate decoupling has the

following capabilities:

–I

< 80 mA at V

DDP

= 4 to 6.5 V

– Handles current spikes of 40 nA up to 20

MHz

– Controls rise and fall times

– Filtered overload detection at

approximately 120 mA

■ Thermal and short-circuit protection on all card

contacts

■ Automatic activation and deactivation

sequences; initiated by software or by

hardware in the event of a short-circuit, card

take-off, overheating, V

or V

DDP

drop-out

■ Enhanced ESD protection on card side (> 6 kV)

■ 26 MHz integrated crystal oscillator

■ Clock generation for cards up to 20 MHz

(divided by 1, 2, 4 or 8 through CLKDIV1 and

CLKDIV2 signals) with synchronous frequency

changes

■ Non-inverted control of RST via pin RSTIN

■ ISO 7816, GSM11.11 and EMV (payment

systems) compatibility

■ Supply supervisor for spike-killing during

power-on and power-off and power-on reset

(threshold fixed internally or externally by a

resistor bridge)

■ Built-in debounce on card presence contacts

■ One multiplexed status signal off

Description

The ST8024 is a complete low cost analog

interface for asynchronous 3 V and 5 V smart

cards. It can be placed between the card and the

microcontroller with few external components to

perform all supply protection and control

functions. ST8024 is a direct replacement of

ST8004.

Main applications are: smartcard readers for set-

top-box, IC card readers for banking,

identification, pay TV.

SO-28

TSSOP28

Table 1. Device summary

Order codes Temperature range Packages Packaging

ST8024CDR - 25 to 85 °C SO-28 (tape and reel) 1000 parts per reel

ST8024CTR - 25 to 85 °C TSSOP28 (tape and reel) 2500 parts per reel

www.st.com

Summary of content (31 pages)

PAGE 1
ST8024 Smartcard interface Features ■ Designed to be compatible with the NDS conditional access system ■ IC card interface ■ 3 or 5 V supply for the IC (VDD and GND) ■ Three specifically protected half-duplex bidirectional buffered I/O lines to card contacts C4, C7 and C8 ■ SO-28 DC-DC converter for VCC generation separately powered from a 5 V ± 20% supply (VDDP and PGND) TSSOP28 ■ ISO 7816, GSM11.
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Contents ST8024 Contents 1 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Functional description . . . . . . .
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ST8024 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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List of figures ST8024 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. 4/31 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Definition of output and input transition times . . . . . . . . . . . . . . . . . . . . . . .
PAGE 5
ST8024 Diagram 1 Diagram Figure 1.
PAGE 6
Pin configuration ST8024 2 Pin configuration Figure 2. Pin connections Table 2. Pin description Pin n° Symbol 1 CLKDIV1 Control of CLK frequency 2 CLKDIV2 Control of CLK frequency 3 5V/3V VCC selection pin 4 PGND Power ground for step-up converter 5 C1+ External cap. for step-up converter 6 VDDP Power supply for step-up converter 7 C1- External cap.
PAGE 7
ST8024 Table 2.
PAGE 8
Maximum ratings ST8024 3 Maximum ratings Table 3. Absolute maximum ratings Symbol Parameter Min. Max. Unit -0.3 7 V VDD, VDDP Supply voltage Vn1 Voltage on pins XTAL1, XTAL2, 5V/3V, RSTIN, AUX2UC, AUX1UC, I/OUC, CLKDIV1, CLKDIV2, PORADJ, CMDVCC, PRES, PRES and OFF -0.3 VDD + 0.3 V Vn2 Voltage on card contact pins I/O, RST, AUX1, AUX2 and CLK -0.3 VCC + 0.
PAGE 9
ST8024 4 Electrical characteristics Electrical characteristics VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are to TA = 25 °C. Table 6. Symbol Electrical characteristics over recommended operating condition Parameter VDD Supply voltage VDDP Supply voltage for the voltage doubler IDD IDDP Test conditions Min. Typ. 2.7 VCC = 5V; |ICC| < 80 mA 4.0 VCC = 5V; |ICC| < 20 mA 3.0 5 Max. Unit 6.5 V 6.5 V 6.5 Card Inactive 1.
PAGE 10
Electrical characteristics ST8024 VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are to TA = 25 °C. Table 7. Symbol fCLK Step-up converter Parameter Test conditions Clock frequency Card active Output voltage on pin VUP (average value) Typ. 2.2 Threshold voltage for step- 5 V card Vth(vd-vf) up converter to change to 3 V card voltage follower VUP(av) Min. Max. Unit 3.2 MHz 5.2 5.8 6.2 3.8 4.1 4.4 VCC = 5 V 5.2 5.7 6.2 VCC = 3 V; VDDP = 3.3 V 3.5 3.
PAGE 11
ST8024 Electrical characteristics VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are to TA = 25 °C. Table 9. Symbol CXTAL1,2 Crystal connection (pins XTAL1 and XTAL2) Parameter Test conditions Min. Typ. External capacitance on pins XTAIL1, Depends on type of XTAIL2 crystal or resonator used Max. Unit 15 pF fXTAL Crystal frequency 2 26 MHz fXTAL1 Frequency applied on pin XTAL1 0 26 MHz VIH High level input voltage on pin XTAIL1 0.7 VDD VDD+0.
PAGE 12
Electrical characteristics Table 11. Symbol ST8024 Data lines to card reader (pins I/O, AUX1 AND AUX2 with integrated 11 kΩ pull-up resistor to VCC Parameter Test conditions Min. Typ. Max. Unit 9 11 13 kΩ RPU Integrated pull-up resistor Pull-up resistor to VCC tT(DI) Data input transition time VIL max to VIH min. 1.2 µs tT(DO) Data output transition time VO = 0 to VCC; CL ≤ 80 pF; 10% to 90% 0.1 µs IPU Current when pull-up active VOH = 0.9VCC; CL = 80 pF -1 mA VDD = 3.
PAGE 13
ST8024 Electrical characteristics VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are to TA = 25 °C. Table 14. Symbol Reset output to card reader (pin RST) Parameter Test conditions Min. Typ. Max. Unit Output voltage in inactive mode IO(inactive) = 1 mA 0 0.3 VO(inactive) No Load 0 0.
PAGE 14
Electrical characteristics ST8024 VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are to TA = 25 °C (Note 5) Table 16. Control inputs (pins CLKDIV1, CLKDIV2, CMDVCC, RSTIN and 5 V / 3 V Symbol Parameter Test conditions Min. Typ. Max. Unit VIL Input voltage low -0.3 0.3VDD V VIH Input voltage high 0.7VDD VDD V |ILIH| Input leakage current high VIH = VDD 1 µA |ILIL| Input leakage current low VIL = 0 1 µA VDD = 3.
PAGE 15
ST8024 Electrical characteristics VDD = 3.3 V, VDDP = 5 V, fXTAL = 10 MHz, unless otherwise noted. Typical values are to TA = 25 °C. Table 20. Symbol Timing Parameter Test conditions tACT Activation time (See Figure 5) tDE Deactivation time (See Figure 7) Min. 60 Typ. Max.
PAGE 16
Functional description 5 ST8024 Functional description Throughout this document it is assumed that the reader is familiar with ISO7816 terminology. 5.1 Power supply The supply pins for the IC are VDD and GND. VDD should be in the range of 2.7 to 6.5 V. All signals interfacing with the system controller are referred to VDD, therefore VDD should also supply the system controller. All card reader contacts remain inactive during power-on or power-off.
PAGE 17
ST8024 Functional description Figure 4. 5.2.2 Voltage supervisor With an external divider on pin PORADJ If an external resistor bridge is connected to pin PORADJ (R1 and R2 in Figure 1), then the following occurs: – The internal threshold voltage Vth2 is overridden by the external voltage and by the hysteresis, therefore: Vth2(ext)(rise) = (1 + R1/R2) x (Vbridge + Vhys(ext)/2) Vth2(ext)(fall) = (1 + R1/R2) x (Vbridge - Vhys(ext)/2) where Vbridge = 1.25 V typ. and Vhys(ext) = 60 mV typ.
PAGE 18
Functional description Table 21. ST8024 Clock frequency selection (1) CLKDIV1 CLKDIV2 fCLK 0 0 fXTAL/8 0 1 fXTAL/4 1 1 fXTAL/2 1 0 fXTAL 1. The status of pins CLKDIV1 and CLKDIV2 must not be changed simultaneously; a delay of 10 ns minimum between changes is needed; the minimum duration of any state of CLK is eight periods of XTAL1.
PAGE 19
ST8024 5.5 Functional description Inactive mode After a power-on reset, the circuit enters the inactive mode.
PAGE 20
Functional description 20/31 ST8024 Figure 5. Activation sequence using RSTIN and CMDVCC Figure 6.
PAGE 21
ST8024 5.7 Functional description Active mode When the activation sequence is completed, the ST8024 will be in its active mode. Data are exchanged between the card and the microcontroller via the I/O lines. The ST8024 is designed for cards without VPP (the voltage required to program or erase the internal non-volatile memory). 5.8 Deactivation sequence When a session is completed, the microcontroller sets the CMDVCC line HIGH.
PAGE 22
Functional description ST8024 detector are internally filtered, allowing spurious current pulses up to 200 mA with a duration in the order of µs to be drawn by the card without causing deactivation. The average current must stay below the specified maximum current value. For reasons of VCC voltage accuracy, a 100 nF capacitor with an ESR < 100 mΩ should be tied to CGND near to pin VCC, and 100 nF capacitor with the same ESR should be tied to CGND near card reader contact C1. 5.
PAGE 23
ST8024 Functional description Figure 9.
PAGE 24
Application 6 ST8024 Application Figure 10. Application diagram 10µF 100nF +5V 100nF 100nF (1) CLKDIV1 1 28 AUX2UC CLKDIV2 2 27 AUX1UC 5/3V 3 26 I/OUC PGND 4 25 XTAL2 C1 + 5 24 XTAL1 VDDP 6 23 OFF C1 - 7 22 GND VUP 8 21 VDD PRES 9 20 RSTIN PRES 10 19 CMDVCC I/O 11 18 PORADJ AUX2 12 17 VCC AUX1 13 16 RST 15 CLK (1) CGND ST8024 14 +3.3 V POWERED 15pF 100nF MICROCONTROLLER 10µF (2) +3.3V +3.3V Vdd (3) 100nF (4) R1 R100K (7) +3.
PAGE 25
ST8024 7 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
PAGE 26
Package mechanical data ST8024 SO-28 mechanical data mm. inch. Dim. Min. Typ. A Max. Min. Typ. 2.65 Max. 0.104 a1 0.1 0.3 0.004 0.012 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.012 C 0.5 0.020 c1 45° (typ.) D 17.70 18.10 0.697 0.713 E 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 16.51 0.650 F 7.40 7.60 0.291 0.300 L 0.50 1.27 0.020 0.050 S 8° (max.
PAGE 27
ST8024 Package mechanical data TSSOP28 mechanical data mm. inch. Dim. Min. Typ. A Max. Min. Typ. Max. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0079 D 9.6 9.7 9.8 0.378 0.382 0.386 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 e 1 0.65 BSC K 0° L 0.45 0.60 0.0256 BSC 8° 0° 0.75 0.018 8° 0.024 0.
PAGE 28
Package mechanical data ST8024 Tape & reel SO-28 mechanical data mm. inch. Dim. Min. A Max. Min. 330 13.2 Typ. Max. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 28/31 Typ. 0.504 30.4 0.519 1.197 Ao 10.8 11.0 0.425 0.433 Bo 18.2 18.4 0.716 0.724 Ko 2.9 3.1 0.114 0.122 Po 3.9 4.1 0.153 0.161 P 11.9 12.1 0.468 0.
PAGE 29
ST8024 Package mechanical data Tape & reel TSSOP28 mechanical data mm. inch. Dim. Min. A Typ. Max. Min. 330 Max. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 Typ. 0.504 22.4 0.519 0.882 Ao 6.8 7 0.268 0.276 Bo 10.1 10.3 0.398 0.406 Ko 1.7 1.9 0.067 0.075 Po 3.9 4.1 0.153 0.161 P 11.9 12.1 0.468 0.
PAGE 30
Revision history ST8024 8 Revision history Table 23. Document revision history Date Revision 18-Mar-2004 4 Pag. 10, fig. 4, RSTIN ==> CLK. 27-Jun-2006 5 Add package TSSOP28. 13-Dec-2006 6 Removed: the comment point 5 on page 22. 03-Jun-2008 7 Added: Table 1 on page 1. 30-Mar-2009 8 Modified: Figure 10 on page 24.
PAGE 31
ST8024 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.