Datasheet

ST7540 Functional description
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In the analog domain, the signal is filtered in order to reduce the output signal spectrum and
to reduce the harmonic distortion. The transition between a symbol and the following is done
at the end of the on-going half FSK sinewave cycle.
Figure 16. Transmitting path block diagram
● Automatic Level Control (ALC)
The Automatic Level Control Block (ALC) is a variable gain amplifier (with 32 non linear
discrete steps) controlled by two analog feed backs acting at the same time. The ALC
gain range is 0dB to 30 dB and the gain change is clocked at 5KHz. Each step
increases or reduces the voltage of 1dB (Typ).
Two are the control loops acting to define the ALC gain:
– A Voltage Control loop
– A Current Control Loop
The Voltage control loop
acts to keep the Peak-to-Peak Voltage constant on Vsense.
The gain adjustment is related to the result of a peak detection between the Voltage
waveform on Vsense and two internal Voltage references. It is possible to protect the
Voltage Control Loop against noise by freezing the output level (see Section 7.5:
Output voltage level freeze).
– If Vsense < Vsense
TH
- Vsense
HYST
The next gain level is increased by 1 step
–If Vsense
TH
- Vsense
HYST
< Vsense < Vsense
TH
+ Vsense
HYST
No Gain Change
– If Vsense > Vsense
TH
+ Vsense
HYST
The next gain level is decreased by 1 step
TRANSMISSION
FILTER
FSK
MODULATOR
D-TYPE
FLIP
FLOP
DAC
14
15
8
6
19
TIMER
THERMAL
SENSOR
VOLTAGE
LOOP
CURRENT
LOOP
CLR/T GENERATOR
24
23
Vsense
CL
PA_IN-
PA_OUT
TX_OUT
CLR/T
TxD
Bit 14
Bits 0-5
Bits 0-2
Bits 7-8
Band Pass
PA
ALC
D03IN1420
18
PA_IN+
+
-
7
BU/THERM
Bits 17 & 21