Datasheet

ST7538Q Functional description
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● Integrated Power Line Interface (PLI)
The Power Line Interface (PLI) is a double CMOS AB Class Power Amplifier with the
two outputs (ATOP1 and ATOP2) in opposition of phase.
Two are the possible configuration:
- Single Ended Output (ATOP1).
- Bridge Connection
The Bridge connection guarantee a Differential Output Voltage to the load with twice
the swing of each individual Output. This topology virtually eliminates the even
harmonics generation.
The PLI requires, to ensure a proper operation, a regulated and well filtered Supply
Voltage. PAVcc Voltage must fulfil the following formula to work without clipping
phenomena:
To allow the driving of an external Power Line Interface, the output of the ALC is
available even on ATO pin. ATO output has a current capability much lower than ATOP1
and ATOP2.
Figure 16. PLI bridge topology
PAVcc
VATOP AC()
2
------------------------------------ 7.5V+≥
LOAD
R1
ALC
VOLTAGE
LOOP
CURRENT
LOOP
Vsense
CL
ATOP1
VR
PK
PAVss
5.6nF
R2
RCL
80 pF
Vout
VR
PK
2*VR
PK
INVERTER
ATOP2
D03IN1422