Datasheet

Functional description ST7538Q
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5.5.1 Communication between host and ST7538Q
The Host can achieve the Mains access by selecting REG_DATA = ”0” and the choice
between Data Transmission or Data Reception is performed by selecting RxTx line
(if RxTx =“1” ST7538Q receives data from mains, if RxTx = ”0” ST7538Q transmits data over
the mains).
Communication between Host and ST7538Q is different in Asynchronous and Synchronous
mode:
● Asynchronous mode
In Asynchronous Mode, data are exchanged without any data Clock reference. The
host controller has to recover the clock reference in receiving Mode and control the Bit
time in transmission mode.
If RxTx line is set to “1” & REG_DATA = ”0” (Data Reception), ST7538Q enters in an
Idle State. After Tcc time the modem starts providing received data on RxD line.
If RxTx line is set to “0” & REG_DATA=”0” (Data Transmission), ST7538Q enters in an
Idle State and transmission circuitry is switched on. After Tcc time the modem starts
transmitting data present on TxD line.
● Synchronous mode
In Synchronous Mode ST7538Q is always the master of the communication and
provides the clock reference on CLR/T line.
When ST7538Q is in receiving mode an internal PLL recovers the clock reference.
Data on RxD line are stable on CLR/T rising Edge.
When ST7538Q is in transmitting mode the clock reference is internally generated and
TxD line is sampled on CLR/T rising Edge.
If RxTx line is set to “1” & REG_DATA=”0” (Data Reception), ST7538Q enters in an Idle
State and CLR/T line is forced Low. After Tcc time the modem starts providing received
data on RxD line.
If RxTx line is set to “0” & REG_DATA=”0” (Data Transmission), ST7538Q enters in an
Idle State and transmission circuitry is switched on. After Tcc time the modem starts
transmitting data present on TxD line (Figure 5) .
Figure 4. Receiving and transmitting data/recovered clock timing
Transmitting Bit Synchronization
CLR/T
RxD
CLR/T
TxD
Receiving Bit Synchronization
T
S
T
H
D03IN1416