Datasheet

ST72321Rx ST72321ARx ST72321Jx
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16-BIT TIMER (Cont’d)
10.4.4 Low Power Modes
10.4.5 Interrupts
Note: The 16-bit Timer interrupt events are connected to the same interrupt vector (see Interrupts chap-
ter). These events generate an interrupt if the corresponding Enable Control Bit is set and the interrupt
mask in the CC register is reset (RIM instruction).
10.4.6 Summary of Timer Modes
1) See note 4 in Section 0.1.3.5 One Pulse Mode
2) See note 5 in Section 0.1.3.5 One Pulse Mode
3) See note 4 in Section 0.1.3.6 Pulse Width Modulation Mode
Mode Description
WAIT
No effect on 16-bit Timer.
Timer interrupts cause the device to exit from WAIT mode.
HALT
16-bit Timer registers are frozen.
In HALT mode, the counter stops counting until Halt mode is exited. Counting resumes from the previous
count when the MCU is woken up by an interrupt with “exit from HALT mode” capability or from the counter
reset value when the MCU is woken up by a RESET.
If an input capture event occurs on the ICAPi pin, the input capture detection circuitry is armed. Consequent-
ly, when the MCU is woken up by an interrupt with “exit from HALT mode” capability, the ICFi bit is set, and
the counter value present when exiting from HALT mode is captured into the ICiR register.
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
Input Capture 1 event/Counter reset in PWM mode ICF1
ICIE
Yes No
Input Capture 2 event ICF2
Output Compare 1 event (not available in PWM mode) OCF1
OCIE
Output Compare 2 event (not available in PWM mode) OCF2
Timer Overflow event TOF TOIE
MODES
TIMER RESOURCES
Input Capture 1 Input Capture 2 Output Compare 1 Output Compare 2
Input Capture (1 and/or 2)
Yes Yes Yes Yes
Output Compare (1 and/or 2)
One Pulse Mode
No
Not Recommended
1)
No
Partially
2)
PWM Mode Not Recommended
3)
No