Datasheet

ST72321Rx ST72321ARx ST72321Jx
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1 DESCRIPTION
The ST72F321 Flash and ST72321 ROM devices
are members of the ST7 microcontroller family de-
signed for mid-range applications.
All devices are based on a common industry-
standard 8-bit core, featuring an enhanced instruc-
tion set and are available with Flash or ROM pro-
gram memory. The ST7 family architecture offers
both power and flexibility to software developers,
enabling the design of highly efficient and compact
application code.
The on-chip peripherals include an A/D converter,
a PWM Autoreload timer, 2 general purpose tim-
ers, I
2
C bus, SPI interface and an SCI interface.
For power economy, microcontroller can switch
dynamically into WAIT, SLOW, ACTIVE-HALT or
HALT mode when the application is in idle or
stand-by state.
Typical applications are consumer, home, office
and industrial products.
Related Documentation
AN1131: Migrating applications from ST72511/
311/314 to ST72521/321/324
Figure 1. Device Block Diagram
8-BIT CORE
ALU
ADDRESS AND DATA BUS
OSC1
V
PP
CONTROL
PROGRAM
(32K - 60K Bytes)
V
DD
RESET
PORT F
PF7:0
(8-bits)
TIMER A
BEEP
PORT A
RAM
(1024 - 2048 Bytes)
PORT C
10-BIT ADC
V
AREF
V
SSA
PORT B
PB7:0
(8-bits)
PWM ART
PORT E
PE7:0
(8-bits)
SCI
TIMER B
PA7:0
(8-bits)
PORT D
PD7:0
(8-bits)
SPI
PC7:0
(8-bits)
V
SS
WATCHDOG
TLI
OSC
LVD
OSC2
MEMORY
MCC/RTC/BEEP
EVD
AVD
I2C