Datasheet

ST72321Rx ST72321ARx ST72321Jx
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WATCHDOG TIMER (Cont’d)
Figure 34. Exact Timeout Duration (t
min
and t
max
)
WHERE:
t
min0
= (LSB + 128) x 64 x t
OSC2
t
max0
= 16384 x t
OSC2
t
OSC2
= 125ns if f
OSC2
=8 MHz
CNT = Value of T[5:0] bits in the WDGCR register (6 bits)
MSB and LSB are values from the table below depending on the timebase selected by the TB[1:0] bits
in the MCCSR register
To calculate the minimum Watchdog Timeout (t
min
):
IF THEN
ELSE
To calculate the maximum Watchdog Timeout (t
max
):
IF THEN
ELSE
Note: In the above formulae, division results must be rounded down to the next integer value.
Example:
With 2ms timeout selected in MCCSR register
TB1 Bit
(MCCSR Reg.)
TB0 Bit
(MCCSR Reg.)
Selected MCCSR
Timebase
MSB LSB
0 0 2ms 4 59
0 1 4ms 8 53
1 0 10ms 20 35
1 1 25ms 49 54
Value of T[5:0] Bits in
WDGCR Register (Hex.)
Min. Watchdog
Timeout (ms)
t
min
Max. Watchdog
Timeout (ms)
t
max
00 1.496 2.048
3F 128 128.552
CNT
MSB
4
-------------
<
t
min
t
min0
16384 CNT t
osc2
××+
=
t
min
t
min0
16384 CNT
4CNT
MSB
-----------------
–
⎝⎠
⎛⎞
× 192 LSB+()64
4CNT
MSB
-----------------
××
+ t
osc2
×+=
CNT
MSB
4
-------------
≤
t
max
t
max0
16384 CNT t
osc2
××+=
t
max
t
max0
16384 CNT
4CNT
MSB
-----------------
–
⎝⎠
⎛⎞
× 192 LSB+()64
4CNT
MSB
-----------------
××
+ t
osc2
×+=