Datasheet

ST72321Rx ST72321ARx ST72321Jx
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6.4 SYSTEM INTEGRITY MANAGEMENT (SI)
The System Integrity Management block contains
the Low Voltage Detector (LVD), Auxiliary Volt-
age Detector (AVD) functions. It is managed by
the SICSR register.
6.4.1 Low Voltage Detector (LVD)
The Low Voltage Detector function (LVD) gener-
ates a static reset when the V
DD
supply voltage is
below a V
IT-
reference value. This means that it
secures the power-up as well as the power-down
keeping the ST7 in reset.
The V
IT-
reference value for a voltage drop is lower
than the V
IT+
reference value for power-on in order
to avoid a parasitic reset when the MCU starts run-
ning and sinks current on the supply (hysteresis).
The LVD Reset circuitry generates a reset when
V
DD
is below:
–V
IT+
when V
DD
is rising
–V
IT-
when V
DD
is falling
The LVD function is illustrated in Figure 15.
The voltage threshold can be configured by option
byte to be low, medium or high.
Provided the minimum V
DD
value (guaranteed for
the oscillator frequency) is above V
IT-
, the MCU
can only be in two modes:
– under full software control
– in static safe reset
In these conditions, secure operation is always en-
sured for the application without the need for ex-
ternal reset hardware.
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
Notes:
The LVD allows the device to be used without any
external RESET circuitry.
If the medium or low thresholds are selected, the
detection may occur outside the specified operat-
ing voltage range. Below 3.8V, device operation is
not guaranteed.
The LVD is an optional function which can be se-
lected by option byte.
It is recommended to make sure that the V
DD
sup-
ply voltage rises monotonously when the device is
exiting from Reset, to ensure the application func-
tions properly.
Figure 15. Low Voltage Detector vs Reset
V
DD
V
IT+
RESET
V
IT-
V
hys