Datasheet

ST72321Rx ST72321ARx ST72321Jx
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SERIAL COMMUNICATIONS INTERFACE (Cont’d)
Figure 62. SCI Baud Rate and Extended Prescaler Block Diagram
TRANSMITTER
RECEIVER
SCIETPR
SCIERPR
EXTENDED PRESCALER RECEIVER RATE CONTROL
EXTENDED PRESCALER TRANSMITTER RATE CONTROL
EXTENDED PRESCALER
CLOCK
CLOCK
RECEIVER RATE
TRANSMITTER RATE
SCIBRR
SCP1
f
CPU
CONTROL
CONTROL
SCP0
SCT2
SCT1 SCT0 SCR2 SCR1SCR0
/PR
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CONVENTIONAL BAUD RATE GENERATOR
EXTENDED RECEIVER PRESCALER REGISTER
EXTENDED TRANSMITTER PRESCALER REGISTER