Datasheet

Application information ST1S41
18/27 DocID023654 Rev 2
6.4 Thermal dissipation
The thermal design is important to prevent the thermal shutdown of the device if junction
temperature goes above 150 °C. The three different sources of losses within the device are:
a) conduction losses due to the on-resistance of the high-side switch (R
HS
) and low-
side switch (R
LS
); these are equal to:
Equation 23
where D is the duty cycle of the application. Note that the duty cycle is theoretically given by
the ratio between V
OUT
and V
IN
, but actually it is slightly higher to compensate the losses of
the regulator.
b) switching losses due to high-side power MOSFET turn-on and off; these can be
calculated as:
Equation 24
where T
RISE
and T
FALL
are the overlap times of the voltage across the high-side power
switch (V
DS
) and the current flowing into it during turn-on and turn-off phases, as shown in
Figure 7. T
SW
is the equivalent switching time. For this device the typical value for the
equivalent switching time is 20 ns.
c) Quiescent current losses, calculated as:
Equation 25
where I
Q
is the quiescent current (I
Q
=2.5 mA maximum).
The junction temperature T
J
can be calculated as:
PANASONIC
ECJ 10 to 22 6.3 < 5
EEFCD 10 to 68 6.3 15 to 55
SANYO TPA/B/C 100 to 470 4 to 16 40 to 80
TDK C3225 22 to 100 6.3 < 5
Table 8. Output capacitors (continued)
Manufacturer Series Cap value (μF) Rated voltage (V) ESR (mΩ)
P
COND
R
HS
I
OUT
2
DR
LS
I
OUT
2
1D–()⋅⋅+⋅⋅=
P
SW
V
IN
I
OUT
T
RISE
T
FALL
+()
2
------------------------------------------ -
Fsw⋅⋅ ⋅ V
IN
I
OUT
T
SW
F
SW
⋅⋅⋅==
P
Q
V
IN
I
Q
⋅=