Datasheet

Functional description ST1S40
12/29 DocID17928 Rev 5
so by closing the loop, the loop gain G
LOOP
(s) is:
Equation 13
Example:
VIN = 12 V, VOUT = 1.2 V, Iomax = 3 A, L = 1.5 µH, Cout = 47 µF (MLCC), R1 = 10 k
 ,
R2 = 20 k
 (see Section 6.2 and Section 6.3 for inductor and output capacitor selection
guidelines).
The module and phase Bode plot are reported in Figure 6.
The bandwidth is 100 kHz and the phase margin is 45 degrees.
Figure 6. Module and phase Bode plot
G
LOOP
s G
CO
sG
DIV
sG
EA
s=