Datasheet
DocID17977 Rev 2 25/46
ST1S14 Application information
high switching current loop areas should be kept as small as possible and lead lengths as
short as possible.
High impedance paths (in particular the feedback connections) are susceptible to
interference, so they should be as far as possible from the high current paths. A layout
example is provided in Figure 14 below.
The input and output loops are minimized to avoid radiation and high frequency resonance
problems. The feedback pin connections to the external divider are very close to the device
in order to avoid pick-up noise. Another important issue is the ground plane of the board. As
the package has an exposed pad, it is very important to connect it to an extended ground
plane in order to reduce the thermal resistance junction-to-ambient.
To increase the design noise immunity, different signal and power ground should be
implemented in the layout (see Section 7.5: Application circuit). The signal ground serves
the small signal components, the device ground pin, the exposed pad, and a small filtering
capacitor connected to the VCC pin. The power ground serves the external diode and the
input filter. The different grounds are connected underneath the output capacitor. Neglecting
the current ripple contribution, the current flowing through this component is constant during
the switching activity and so this is the cleanest ground point of the buck application circuit.
Figure 14. Layout example
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