Datasheet
Table Of Contents
- Table 1. Device summary
- 1 Application circuit
- 2 Pin configuration
- 3 Maximum ratings
- 4 Electrical characteristics
- 5 Application information
- 5.1 Description
- 5.2 External components selection
- 5.3 Output capacitor (VOUT > 2.5 V)
- 5.4 Output capacitor (0.8 V < VOUT < 2.5 V)
- 5.5 Output voltage selection
- 5.6 Inductor (VOUT > 2.5 V)
- 5.7 Inductor (0.8 V < VOUT < 2.5 V)
- 5.8 Function operation
- 6 Layout considerations
- 7 Diagram
- 8 Typical performance characteristics
- Figure 9. Voltage feedback vs. temperature
- Figure 10. Oscillator frequency vs. temperature
- Figure 11. Max duty cycle vs. temperature
- Figure 12. Inhibit threshold vs. temperature
- Figure 13. Reference line regulation vs. temperature
- Figure 14. Reference load regulation vs. temperature
- Figure 15. ON mode quiescent current vs. temperature
- Figure 16. Shutdown mode quiescent current vs. temperature
- Figure 17. PMOS ON resistance vs. temperature
- Figure 18. NMOS ON resistance vs. temperature
- Figure 19. Efficiency vs. temperature
- Figure 20. Efficiency vs. output current@Vout = 5 V
- Figure 21. Efficiency vs. output current@Vout = 3.3 V
- Figure 22. Efficiency vs. output current@Vout = 12 V
- 9 Package mechanical data
- Table 6. Power SO-8 (exposed pad) mechanical data
- Figure 23. Power SO-8 (exposed pad) dimensions
- Figure 24. Power SO-8 (exposed pad) recommended footprint
- Table 7. Power SO-8 (exposed pad) tape and reel mechanical data
- Figure 25. Power SO-8 (exposed pad) tape and reel dimensions
- Table 8. DFN8 (4X4) mechanical data
- Figure 26. DFN8 (4x4) dimensions
- Table 9. DFN8 (4x4)tape and reel mechanical data
- Figure 27. DFN8 (4x4)tape and reel dimensions
- 10 Revision history

Application information ST1S10
10/29 Doc ID 13844 Rev 5
5 Application information
5.1 Description
The ST1S10 is a high efficiency synchronous step-down DC-DC converter with inhibit
function. It provides up to 3 A over an input voltage range of 2.5 V to 18 V, and the output
voltage can be adjusted from 0.8 V up to 85% of the input voltage level. The synchronous
rectification removes the need for an external Schottky diode and allows higher efficiency
even at very low output voltages.
A high internal switching frequency (0.9 MHz) allows the use of tiny surface-mount
components, as well as a resistor divider to set the output voltage value. In typical
application conditions, only an inductor and 3 capacitors are required for proper operation.
The device can operate in PWM mode with a fixed frequency or synchronized to an external
frequency through the SYNC pin. The current mode PWM architecture and stable operation
with low ESR SMD ceramic capacitors results in low, predictable output ripple. No external
compensation is needed.
To maximize power conversion efficiency, the ST1S10 works in pulse skipping mode at light
load conditions and automatically switches to PWM mode when the output current
increases.
The ST1S10 is equipped with thermal shut down protection activated at 150 °C (typ.).
Cycle-by-cycle short circuit protection provides protection against shorted outputs for the
application and the regulator. An internal soft start for start-up current limiting and power ON
delay of 275 µs (typ.) helps to reduce inrush current during start-up.
5.2 External components selection
5.2.1 Input capacitor
The ST1S10 features two V
IN
pins: V
IN_SW
for the power supply input voltage where the
switching peak current is drawn, and V
IN_A
to supply the ST1S10 internal circuitry and
drivers.
The V
IN_SW
input capacitor reduces the current peaks drawn from the input power supply
and reduces switching noise in the IC. A high power supply source impedance requires
larger input capacitance.
For the V
IN_SW
input capacitor the RMS current rating is a critical parameter that must be
higher than the RMS input current. The maximum RMS input current can be calculated
using the following equation:
Equation 1
where η is the expected system efficiency, D is the duty cycle and I
O
is the output DC
current. The duty cycle can be derived using the equation:
η
D
η
D2
-DII
22
ORMS
+
⋅
⋅
=
η
D
η
D2
-DII
22
ORMS
+
⋅
⋅
=