Datasheet

Application information ST1CC40
24/37 DocID18279 Rev 5
To increase the design noise immunity, different signal and power ground should be
implemented in the layout (see Section 7.5: Application circuit). The signal ground serves
the small signal components, the device analog ground pin, the exposed pad and a small
filtering capacitor connected to the V
INA
pin. The power ground serves the device ground
pin and the input filter. The different grounds are connected underneath the output capacitor.
Neglecting the current ripple contribution, the current flowing through this component is
constant during the switching activity and so this is the cleanest ground point of the buck
application circuit.
Figure 13. Layout example
7.3 Thermal considerations
The dissipated power of the device is tied to three different sources:
 Conduction losses due to the R
DS(on)
, which are equal to:
Equation 28
where D is the duty cycle of the application. Note that the duty cycle is theoretically given by
the ratio between V
OUT
(n
LED
V
LED
+ 100 mV) and V
IN
, but in practice it is substantially
higher than this value to compensate for the losses in the overall application. For this
reason, the conduction losses related to the R
DS(on)
increase compared to an ideal case.
P
ON
R
RDSON_HS
I
OUT

2
D =
P
OFF
R
RDSON_LS
I
OUT

2
1D–=