Datasheet

6 - CENTRAL PROCESSING UNIT (CPU) ST10F269
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The Table 5 shows the various combinations of pointer post-modification for each of these 2 new address-
ing modes. In this document the symbols “[Rw
n
⊗]” and “[IDX
i
⊗]” refer to these addressing modes.
Table 5 : Pointer Post-modification Combinations for IDXi and Rwn
Symbol Mnemonic Address Pointer Operation
“[IDX
i
⊗]” stands for [IDX
i
](IDX
i
) ← (IDX
i
) (no-op)
[IDX
i
+](IDX
i
) ← (IDX
i
) + 2 (i=0,1)
[IDX
i
-] (IDX
i
) ← (IDX
i
) - 2 (i=0,1)
[IDX
i
+ QX
j
](IDX
i
) ← (IDX
i
) + (QX
j
) (i, j =0,1)
[IDX
i
- QX
j
](IDX
i
) ← (IDX
i
) - (QX
j
) (i, j =0,1)
“[Rw
n
⊗]” stands for [Rwn] (Rwn) ← (Rwn) (no-op)
[Rwn+] (Rwn) ← (Rwn) + 2 (n=0-15)
[Rwn-] (Rwn) ← (Rwn) - 2 (n=0-15)
[Rwn + QR
j
] (Rwn) ← (Rwn) + (QR
j
) (n=0-15; j =0,1)
[Rwn - QR
j
] (Rwn) ← (Rwn) - (QR
j
) (n=0-15; j =0,1)
Table 6 : MAC Registers Referenced as ‘CoReg‘
Registers Description Address in Opcode
MSW MAC-Unit Status Word 00000b
MAH MAC-Unit Accumulator High 00001b
MAS “limited” MAH /signed 00010b
MAL MAC-Unit Accumulator Low 00100b
MCW MAC-Unit Control Word 00101b
MRW MAC-Unit Repeat Word 00110b