Datasheet

Application information PM8903A
18/33 Doc ID 024147 Rev 1
6 Application information
6.1 Compensation network
The PM8903A implements a voltage mode control loop (see Figure 11 ). The output voltage
is regulated to the internal reference (offset resistor between FB node and GND can be
neglected in control loop calculation).
Error amplifier output is compared with the oscillator sawtooth waveform to provide the
PWM signal to the driver section. The PWM signal is then transferred to the switching node
with V
IN
amplitude. This waveform is filtered by the output filter.
The converter transfer function is the small signal transfer function between the output of the
EA and V
OUT
. This function has a double pole at frequency F
LC
depending on the L-C output
filter and a zero at F
ESR
depending on the output capacitor ESR. The DC gain of the
modulator is simply the input voltage V
IN
divided by the peak-to-peak oscillator voltage
ΔV
OSC
.
Figure 11. PM8903A control loop
The compensation network closes the loop joining V
OUT
and EA output with a transfer
function ideally equal to -Z
F
/Z
FB
.
The compensation goal is to close the control loop assuring high DC regulation accuracy,
good dynamic performance, and stability. To achieve this, the overall loop needs high DC
gain, high bandwidth and good phase margin.
High DC gain is achieved giving an integrator shape to the compensation network transfer
function. Loop bandwidth (F
0dB
) can be fixed choosing the right R
F
/R
FB
ratio, however, for
FB
R
F
C
F
R
FB
L
ESR
C
OUT
V
OUT
COMP
C
P
R
OS
R
S
C
S
DCR
OSC
HS
LS
DRIVER
DRIVER
ΔV
OSC
ERROR
AMPLIFIER
Modulator
Output Filter
Z
FB
Z
F
V
REF
V
IN
PHASE