Datasheet

PM6641 Application examples
Doc ID 13510 Rev 3 41/47
9 Application examples
The following application examples are typical or customized applications. Each example
has been tested and evaluated and the schematic and BOM are available for reference
design.
9.1 UMPC DDR2 and chipset power supply
Figure 34. System architecture for DDR2 and chipset power supply
This application is conceived for real estate constrained portable equipment with DDR2
memory. An input power voltage pre-regulated to 3.3 V or 5 V is available and the available
output maximum power levels are shown in
Figure 34. The switching regulator average load
is estimated to be about 50% of the maximum load; this upper limit must be respected in
order to avoid dangerous stresses for internal power MOSFETs. The following table
resumes these current values.
Table 12. Expected average and peak currents for DDR2 and chipset power supply
Output rail Max non continuous load [A] Expected average load [A]
1.8 V (VDDQ) 2.5 1.3
0.9 V (VTT) ±2 0.3
1.5 V 2.8 1.4
1.05 V 4 2
PM6641
3.3V
VDDQ
1.8V @
VTT (LDO)
0.9V @ 2A
1.5V @
1.05V @ 4A
2.5A
2.8A