Datasheet

Device description PM6641
30/47 Doc ID 13510 Rev 3
7.9 Phase management
When all the three switching regulators high side MOSFETs are turned on simultaneously
the input root mean square (RMS) current could rise up to very high values, increasing the
system losses and inducing external components overheating. It’s possible to reduce the
input overall RMS current by inserting one ceramic capacitor as close as possible to each
switching regulator power supply input, reducing the impulsive input current path. However
this synchronous mode of operation is jitter-free and noise immune.
Another possible way to reduce the input RMS current is based on the phase shifting
technique, which decreases the total input current by delaying the regulators turn on pulse.
With three regulators turned on, the 120d e.g. phase shifting allows to reduce the overall
input current up to 1.73 times as depicted in the following configuration, in which three
independent regulators with Vout/Vin lower than 0.333 and identical output current (I) are
managed with synchronous or 120 deg phase shifted turning on.
Figure 32. SW regulator phase management
Each regulator RMS input current is easily computed:
Equation 7
defining T
SW
the switching period, equal to and T
ON
the high side MOSFET on time.
I
L1
I
L2
I
L3
I
L1
I
L2
I
L3
I
CIN
I
CIN
Synchronous 120deg delay
+
+
+
+
= =
ON
2
SW
T
2
3L,2L,1L
SW
3L,2L,1L
TI
T
1
dtI
T
1
I
SW
==
∫
SW
f
1