User manual

DocID026171 Rev 6 37/79
VL6180X I
2
C control interface
78
5 I
2
C control interface
The VL6180X is controlled over an I
2
C interface. The default I
2
C address is 0x29 (7-bit).
This section describes the I
2
C protocol.
Figure 21. Serial interface data transfer protocol
Information is packed in 8-bit packets (bytes) always followed by an acknowledge bit, As for
sensor acknowledge and Am for master acknowledge. The internal data is produced by
sampling SDA at a rising edge of SCL. The external data must be stable during the high
period of SCL. The exceptions to this are start (S) or stop (P) conditions when SDA falls or
rises respectively, while SCL is high.
A message contains a series of bytes preceded by a start condition and followed by either a
stop or repeated start (another start condition but without a preceding stop condition)
followed by another message. The first byte contains the device address (0x52) and also
specifies the data direction. If the least significant bit is low (0x52) the message is a master
write to the slave. If the lsb is set (0x53) then the message is a master read from the slave.
Figure 22. I
2
C device address
All serial interface communications with the sensor must begin with a start condition. The
sensor acknowledges the receipt of a valid address by driving the SDA wire low. The state
of the read/write bit (lsb of the address byte) is stored and the next byte of data, sampled
from SDA, can be interpreted. During a write sequence the second and third bytes received
provide a 16-bit index which points to one of the internal 8-bit registers.
Figure 23. Single location, single write)
12
7
8
As/Am
Start condition
Stop condition
SDA
SCL
Acknowledge
P
S
3 4 56
Address or data byte
MSB LSB
MSBit
LSBit
0101001R/W
Sensor acknowledges
Acknowledge from sensor
S AsADDRESS[7:0] AsINDEX[15:8] INDEX[7:0] As DATA[7:0] As P
0x52 (write)
Start
Stop
valid address