User's Manual
Table Of Contents
- 1 Features
- 2 Ordering information
- 3 Development environment
- 4 Conventions
- 5 Delivery recommendations
- 6 Hardware layout and configuration
- 6.1 Power supply management
- 6.2 Clocks
- 6.3 Reset sources
- 6.4 User buttons and LEDs
- 6.5 Physical input devices: buttons
- 6.6 Boot options
- 6.7 Embedded ST-LINK/V2-1
- 6.8 ETM TRACE Mictor-38 connector
- 6.9 JTAG connector
- 6.10 DDR3L
- 6.11 eMMC
- 6.12 NAND Flash memory
- 6.13 Quad-SPI NOR Flash memory
- 6.14 microSD card
- 6.15 Audio
- 6.16 DSI LCD
- 6.17 Camera
- 6.18 1 Gbps Ethernet
- 6.19 USB OTG HS
- 6.20 USB host
- 6.21 RS-232 port
- 6.22 CAN FD
- 6.23 Smartcard
- 6.24 ADC/DAC
- 6.25 I2C_EXT connector
- 6.26 MFX MCU
- 6.27 Motor control
- 6.28 GPIO 40-pin expansion connector
- 6.29 RGB LTDC connector
- 7 STM32MP157F-EV1 Evaluation board information
- Appendix B STM32MP157F-EV1 I/O assignment
- Appendix C Federal Communications Commission (FCC) and ISED Canada Compliance Statements
- Appendix D CE conformity
- Revision history
- Contents
- List of tables
- List of figures
LFBGA448 ball I/O port Main function Motor control connector
A4 PE13 SAI2_FSB -
B4 PE14 SAI2_MCLKB -
C4 PE15 - -
E10 PF0 SDMMC3_D0 -
B9 PF1 SDMMC3_CMD -
F13 PF2 SDMMC1_D0DIR -
V3 PF3 GPIO NTC Bypass
F9 PF4 SDMMC3_D1 -
D9 PF5 SDMMC3_D2 -
AA11 PF6 QSPI_BK1_IO3 -
AA10 PF7 QSPI_BK1_IO2 -
AB10 PF8 QSPI_BK1_IO0 -
AB11 PF9 QSPI_BK1_IO1 -
V12 PF10 QSPI_CLK -
W8 PF11 SAI_2_SDB Heatsink Temp.
V8 PF12 SLOW ADC PhaseA current
W7 PF13 DFSDM_DATA3 -
V7 PF14 uSD_LDO_SEL -
W6 PF15 DSI_RESET -
W5 PG0 ETH_MDINT -
Y4 PG1 uSD_DETECT -
W4 PG2 MCO2 -
U4 PG3 CAN_STBY -
AB4 PG4 ETH_GTX_CLK -
U8 PG5 ETH_CLK125 -
D11 PG6 SDMMC2_CMD -
Y11 PG7 QSPI_BK2_IO3 -
Y8 PG8 USART3_RTS -
W15 PG9 NAND_NCE -
AA9 PG10 QSPI_BK2_IO2 -
U11 PG11 UART4_TX -
J4 PG12 SPDIF_RX -
AA1 PG13 ETH_TXD0 -
AA2 PG14 ETH_TXD1 -
D10 PG15 SDMMC3_CK -
T1 PH0 HSE_IN -
T2 PH1 HSE_OUT -
AB7 PH2 QSPI_BK2_IO0 -
Y6 PH3 QSPI_BK2_IO1 -
A3 PH4 I2C2_SCL -
UM2648
STM32MP157F-EV1 I/O assignment
UM2648 - Rev 1
page 47/61