User's Manual
Table Of Contents
- 1 Features
- 2 Ordering information
- 3 Development environment
- 4 Conventions
- 5 Delivery recommendations
- 6 Hardware layout and configuration
- 6.1 Power supply management
- 6.2 Clocks
- 6.3 Reset sources
- 6.4 User buttons and LEDs
- 6.5 Physical input devices: buttons
- 6.6 Boot options
- 6.7 Embedded ST-LINK/V2-1
- 6.8 ETM TRACE Mictor-38 connector
- 6.9 JTAG connector
- 6.10 DDR3L
- 6.11 eMMC
- 6.12 NAND Flash memory
- 6.13 Quad-SPI NOR Flash memory
- 6.14 microSD card
- 6.15 Audio
- 6.16 DSI LCD
- 6.17 Camera
- 6.18 1 Gbps Ethernet
- 6.19 USB OTG HS
- 6.20 USB host
- 6.21 RS-232 port
- 6.22 CAN FD
- 6.23 Smartcard
- 6.24 ADC/DAC
- 6.25 I2C_EXT connector
- 6.26 MFX MCU
- 6.27 Motor control
- 6.28 GPIO 40-pin expansion connector
- 6.29 RGB LTDC connector
- 7 STM32MP157F-EV1 Evaluation board information
- Appendix B STM32MP157F-EV1 I/O assignment
- Appendix C Federal Communications Commission (FCC) and ISED Canada Compliance Statements
- Appendix D CE conformity
- Revision history
- Contents
- List of tables
- List of figures
I/O Configuration
MFX_O2 XSDN – Camera PWDN, active high
1.
Available on the MB1262/CN7 connector, but not used in the MB1379 module
6.18 1 Gbps Ethernet
The STM32MP157F-EV1 board provides a 1 Gbps Ethernet feature by means of an external physical interface
device (PHY), R
TL8211EG-VB-CG. This PHY is connected to the STM32MP157FAA1 gigabit reduced medium-
independent interface (RGMII), and is clocked from a 25 MHz crystal (X1).
The Ethernet PHY is supplied by 3V3. It generates its own supply 1V05 and digital/analog 3V3.
LD1 LED blinks to indicate data transmission.
The Ethernet module connector MB1262/CN6 is for STMicroelectronics internal use only.
6.18.1 RGMII interface
Table 26 describes the I/O configuration for the Ethernet interface.
T
able 26. I/O configuration for the Ethernet interface
I/O Configuration
PD10 PD10 (SUB_NRST) is used as PHY_NRST active Low
PA2 PA2 is used as ETH_MDIO
PG0 PG0 is used as ETH_MDINT
PC1 PB11 is used as ETH_MDC
PA7 PA7 is used as ETH_RX_DV(PHY_AD2)
PC4 PC4 is used as ETH_RXD0
PC5 PC5 is used as ETH_RXD1
PB0 PB0 is used as ETH_RXD2
PB1 PB1 is used as ETH_RXD3
PB11 PB11 is used as ETH_TX_EN
PG13 PG13 is used as ETH_TXD0
PG14 PG14 is used as ETH_TXD1
PC2 PB11 is used as ETH_TXD2
PE2 PE2 is used as ETH_TXD3
PA1 PA1 is used as ETH_RX_CLK
PG4 PG4 is used as ETH_GTX_CLK
PG5 PG5 is used as ETH_CLK125
UM2648
1 Gbps Ethernet
UM2648 - Rev 1
page 28/61