Datasheet

Instructions M95M01-DF M95M01-R
18/45 Doc ID 13264 Rev 11
6.2 Write Disable (WRDI)
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction
to the device.
As shown in Figure 9, to send this instruction to the device, Chip Select (S
) is driven low,
and the bits of the instruction byte are shifted in, on Serial Data Input (D).
The device then enters a wait state. It waits for a the device to be deselected, by Chip Select
(S
) being driven high.
The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:
● Power-up
● WRDI instruction execution
● WRSR instruction completion
● WRITE instruction completion.
Figure 9. Write Disable (WRDI) sequence
C
D
AI03750D
S
Q
21 34567
High Impedance
0
Instruction