Datasheet

M95M01-DF M95M01-R Instructions
Doc ID 13264 Rev 11 17/45
6.1 Write Enable (WREN)
The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction.
The only way to do this is to send a Write Enable instruction to the device.
As shown in Figure 8, to send this instruction to the device, Chip Select (S
) is driven low,
and the bits of the instruction byte are shifted in, on Serial Data Input (D). The device then
enters a wait state. It waits for the device to be deselected, by Chip Select (S
) being driven
high.
Figure 8. Write Enable (WREN) sequence
C
D
AI02281E
S
Q
21 34567
High Impedance
0
Instruction