Datasheet

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M95640, M95320
SUMMARY DESCRIPTION
These electrically erasable programmable memo-
ry (EEPROM) devices are accessed by a high
speed SPI-compatible bus.
The M95320, M95320-W, M95320-R and
M95320-S are 32Kbit devices organized as 4096
x 8 bits. The M95640, M95640-W, M95640-R and
M95640-S are 64Kbit devices organized as 8192
x 8 bits.
The device is accessed by a simple serial interface
that is SPI-compatible. The bus signals are C, D
and Q, as shown in Table 3. and Figure 2..
The device is selected when Chip Select (S
) is tak-
en Low. Communications with the device can be
interrupted using Hold (HOLD
).
The devices are available in three different ver-
sions identified by a specific marking (see Table
2.).
Table 2. How to Identify Previous, Current and New Products by the Process Identification Letter
Note: 1. For further information, please ask your ST Sales Office for Process Change Notices.
Figure 2. Logic Diagram Figure 3. 8 Pin Package Connections
Note: 1. See PACKAGE MECHANICAL section for package di-
mensions and how to identify pin-1.
2. NC, Not Connected.
Table 3. Signal Names
Devices Root Part Numbers
Markings on
Previous
Products
1
Markings on
Current
Products
1
Markings on
New
Products
1
M95320, M95640, M95320-W, M95640-W
Device Grade 6
xxxxS xxxxV xxxxP
M95320, M95640, M95320-W, M95640-W Device Grade 3 xxxxS xxxxB xxxxP
M95320-R, M95640-R - - xxxxP
M95320-S, M95640-S - - xxxxP
AI01789C
S
V
CC
M95xxx
HOLD
V
SS
W
Q
C
D
C Serial Clock
D Serial data Input
Q Serial data Output
S
Chip Select
W
Write Protect
HOLD
Hold
V
CC
Supply Voltage
V
SS
Ground
DV
SS
C
HOLDQ
SV
CC
W
AI01790D
M95xxx
1
2
3
4
8
7
6
5