Datasheet

M95640, M95320
12/42
MEMORY ORGANIZATION
The memory is organized as shown in Figure 7..
Figure 7. Block Diagram
AI01272C
HOLD
S
W
Control Logic
High Voltage
Generator
I/O Shift Register
Address Register
and Counter
Data
Register
1 Page
X Decoder
Y Decoder
C
D
Q
Size of the
Read only
EEPROM
area
Status
Register