Datasheet

DocID12276 Rev 20 37/52
M95256-W M95256-R M95256-DR M95256-DF DC and AC parameters
Table 19. AC characteristics (M95256-W, device grade 6)
Test conditions specified in
Table 9 and Table 12
Previous
(1)
and new
products
C
L
= 100 pF
1. Previous products are identified by process letters AB.
New products
(2)
C
L
= 30 pF
2. New products are M95256 devices identified by process letter K.
Unit
V
CC
≥ 2.5V V
CC
≥ 4.5V
Symbol Alt. Parameter Min. Max. Min. Max. Min. Max.
f
C
f
SCK
Clock frequency D.C. 5 D.C. 10 D.C. 20 MHz
t
SLCH
t
CSS1
S active setup time 90 30 15 ns
t
SHCH
t
CSS2
S not active setup time 90 30 15 ns
t
SHSL
t
CS
S deselect time 100 40 20 ns
t
CHSH
t
CSH
S active hold time 90 30 15 ns
t
CHSL
S not active hold time 90 30 15 ns
t
CH
(3)
3. t
CH
+ t
CL
must never be less than the shortest possible clock period, 1 / f
C
(max).
t
CLH
Clock high time 90 40 20 ns
t
CL
(3)
t
CLL
Clock low time 90 40 20 ns
t
CLCH
(3)
t
RC
Clock rise time 1 2 2 µs
t
CHCL
(3)
t
FC
Clock fall time 1 2 2 µs
t
DVCH
t
DSU
Data in setup time 20 10 5 ns
t
CHDX
t
DH
Data in hold time 30 10 10 ns
t
HHCH
Clock low hold time after
HOLD not active
70 30 15 ns
t
HLCH
Clock low hold time after
HOLD active
40 30 15 ns
t
CLHL
Clock low setup time
before HOLD active
000ns
t
CLHH
Clock low setup time
before HOLD not active
000ns
t
SHQZ
(4)
4. Characterized only, not tested in production.
t
DIS
Output disable time 100 40 20 ns
t
CLQV
t
V
Clock low to output valid 60 40 20 ns
t
CLQX
t
HO
Output hold time 0 0 0 ns
t
QLQH
(4)
t
RO
Output rise time 50 20 10 ns
t
QHQL
(4)
t
FO
Output fall time 50 20 10 ns
t
HHQV
t
LZ
HOLD high to output
valid
50 40 20 ns
t
HLQZ
(4)
t
HZ
HOLD low to output
High-Z
100 40 20 ns
t
W
t
WC
Write time 5 5 5 ms