Datasheet

Instructions M950x0-W M950x0-R M950x0-DF
24/45 DocID6512 Rev 12
Figure 13. Page Write (WRITE) sequence
1. Depending on the memory size, as shown in Table 7: Address range bits, the most significant address bits are Don’t Care.
C
D
S
21 34567891011121314151617181920 21 22 23
Instruction Byte Address
0
Data Byte 1
C
D
AI01443D
S
2625 27 28 29 30 31 8+8N 24
Data Byte 16
9+8N 10+8N 11+8N 12+8N 13+8N 14+8N 15+8N 136 137 138 139 140 141 142 143
Data Byte N
76 3210
54
Data Byte 2
7
A7 A6 A5 A4 A3 A2 A1 A0A8 765432 0
1
7 6543210765432 0
1