Datasheet

DocID6512 Rev 12 17/45
M950x0-W M950x0-R M950x0-DF Instructions
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6.1 Write Enable (WREN)
The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction.
The only way to do this is to send a Write Enable instruction to the device.
As shown in Figure 7: Write Enable (WREN) sequence, to send this instruction to the
device, Chip Select (S) is driven low, and the bits of the instruction byte are shifted in, on
Serial Data Input (D). The device then enters a wait state. It waits for a the device to be
deselected, by Chip Select (
S) being driven high.
Figure 7. Write Enable (WREN) sequence
C
D
AI01441D
S
Q
21 34567
High Impedance
0
Instruction