Datasheet

DocID6512 Rev 12 15/45
M950x0-W M950x0-R M950x0-DF Memory organization
44
5 Memory organization
The memory is organized as shown in Figure 6.
Figure 6. Block diagram
MS19733V1
HOLD
S
W
Control logic
High voltage
generator
I/O shift register
Address register
and counter
Data
register
1 page
X decoder
Y decoder
C
D
Q
Size of the
Read only
EEPROM
area
Status
register
Identification page
1/4
1/2