Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsIntegrated Circuits (ICs)SOIC 8 4 kBit 256 x 16

This is information on a product in full production.

November 2013 DocID5124 Rev 6 1/37

M93S46-W M93S56-W

M93S66-W

4 Kbit, 2 Kbit and 1 Kbit serial MICROWIRE bus

EEPROM with write protection

Datasheet - production data

Features

• Compatible with MICROWIRE bus serial

interface

• Memory array

– 1 Kbit, 2 Kbit or 4 Kbit of EEPROM

– Organized by word (16b)

– Page = 4 words

• Write

– Byte write within 5 ms

– Page write within 5 ms

– Ready/busy signal during programming

• User defined write protected area

• High-speed clock: 2 MHz

• Single supply voltage:

– 2.5 V to 5.5 V

• Operating temperature range:

-40 °C up to +85 °C.

• Enhanced ESD protection

• More than 4 million write cycles

• More than 200-year data retention

Packages

• PDIP8 ECOPACK

• TSSOP8 ECOPACK

• SO8 ECOPACK

PDIP8 (BN)

TSSOP8 (DW)

169 mil width

SO8 (MN)

150 mil width

www.st.com

Summary of content (37 pages)

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M93S46-W M93S56-W M93S66-W 4 Kbit, 2 Kbit and 1 Kbit serial MICROWIRE bus EEPROM with write protection Datasheet - production data Features • Compatible with MICROWIRE bus serial interface • Memory array – 1 Kbit, 2 Kbit or 4 Kbit of EEPROM – Organized by word (16b) – Page = 4 words PDIP8 (BN) • Write – Byte write within 5 ms – Page write within 5 ms – Ready/busy signal during programming • User defined write protected area • High-speed clock: 2 MHz TSSOP8 (DW) 169 mil width • Single supply voltage: – 2
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Contents M93S46-W M93S56-W M93S66-W Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Serial data output (Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Serial data input (D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.
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M93S46-W M93S56-W M93S66-W Contents 8 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 10 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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List of tables M93S46-W M93S56-W M93S66-W List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. 4/37 Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Instruction set for the M93S46 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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M93S46-W M93S56-W M93S66-W List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 8-pin package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Write sequence with one clock glitch . .
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Description 1 M93S46-W M93S56-W M93S66-W Description The M93S46, M93S56, M93S66 devices are Electrically Erasable PROgrammable Memories (EEPROMs) organized as 64, 128 or 256 words (one word is 16 bits), accessed through the MICROWIRE bus. The M93S46, M93S56, M93S66 can operate with a supply voltage from 2.5 V to 5.5 V over an ambient temperature range of -40 °C / +85 °C. Figure 1. Logic diagram VCC D C Q M93Sx6 S PRE W VSS AI02020 Figure 2.
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M93S46-W M93S56-W M93S66-W Description Table 1. Signal names Signal name Function S Chip select input D Serial data input Q Serial data output C Serial clock PRE Protection register enable W Write enable VCC Supply voltage VSS Ground The MICROWIRE bus signals are C, D and Q, as shown in Figure 1 and Table 1. The device is selected when Chip Select (S) is driven high.
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Signal description 2 M93S46-W M93S56-W M93S66-W Signal description During all operations, VCC must be held stable and within the specified valid range: VCC(min) to VCC(max). All of the input and output signals can be held high or low (according to voltages of VIL, VIH, VOL or VOH, as specified in Table 10: DC Characteristics (M93Sx6-W, device grade 6). These signals are described next. 2.1 Serial data output (Q) This output signal is used to transfer data serially out of the device.
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M93S46-W M93S56-W M93S66-W 2.7 Signal description VSS ground VSS is the reference for the VCC supply voltage. 2.8 Supply voltage (VCC) 2.8.1 Operating supply voltage VCC Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage within the specified [VCC(min), VCC(max)] range must be applied (see Table 5: Operating conditions (M93Sx6-W)).
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Operating features 3 M93S46-W M93S56-W M93S66-W Operating features The device is compatible with the MICROWIRE protocol. All instructions, addresses and input data bytes are shifted into the device, most significant bit first. The Serial Data Input (D) is sampled on the first rising edge of the Serial Clock (C) after Chip Select (S) goes high. All output data bytes are shifted out of the device, most significant bit first.
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M93S46-W M93S56-W M93S66-W 4 Clock pulse counter Clock pulse counter In a noisy environment, the number of pulses received on Serial Clock (C) may be greater than the number delivered by the Bus Master (the micro- controller). This can lead to a misalignment of the instruction of one or more bits (as shown in Figure 3.) and may lead to the writing of erroneous data at an erroneous address.
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Instructions 5 M93S46-W M93S56-W M93S66-W Instructions The instruction set of the M93Sx6 devices contains seven instructions, as summarized in Table 2 and Table 3. Each instruction consists of the following parts, as shown in Figure 4: • Each instruction is preceded by a rising edge on Chip Select Input (S) with Serial Clock (C) being held Low. • A start bit, which is the first '1' read on Serial Data Input (D) during the rising edge of Serial Clock (C).
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M93S46-W M93S56-W M93S66-W Instructions Table 2.
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Instructions M93S46-W M93S56-W M93S66-W Table 3.
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M93S46-W M93S56-W M93S66-W 5.1 Instructions Read The Read Data from Memory (READ) instruction outputs serial data on Serial Data Output (Q). When the instruction is received, the op-code and address are decoded, and the data from the memory is transferred to an output shift register. A dummy 0 bit is output first, followed by the 16-bit word, with the most significant bit first. Output data changes are triggered by the rising edge of Serial Clock (C).
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Instructions M93S46-W M93S56-W M93S66-W Figure 4. READ, WRITE, WEN and WDS sequences READ PRE S D 1 1 0 An A0 Q Qn ADDR Q0 DATA OUT OP CODE WRITE PRE W S CHECK STATUS D 1 0 1 An A0 Dn D0 Q ADDR DATA IN BUSY READY OP CODE WRITE ENABLE PRE WRITE DISABLE PRE W S S D D 1 0 0 1 1 Xn X0 1 0 0 0 0 Xn X0 OP CODE OP CODE AI00889D Note: 16/37 For the meanings of An, Xn, Qn and Dn, see Table 2 and Table 3.
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M93S46-W M93S56-W M93S66-W 5.3 Instructions Write to memory array (WRITE) The Write Data to Memory instruction is composed of the Start bit plus the op-code followed by the address and the 16 data bits to be written. Write Enable (W) must be held High before and during the instruction. Input address and data, on Serial Data Input (D) are sampled on the rising edge of Serial Clock (C).
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Instructions M93S46-W M93S56-W M93S66-W Figure 5. PAWRITE and WRAL sequence PAGE WRITE PRE W S CHECK STATUS D 1 1 1 An A0 Dn D0 Q ADDR DATA IN BUSY READY OP CODE WRITE ALL PRE W S CHECK STATUS D 1 0 0 0 1 Xn X0 Dn D0 Q ADDR DATA IN BUSY READY OP CODE AI00890C Note: 18/37 For the meanings of An, Xn and Dn, see Table 2 and Table 3.
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M93S46-W M93S56-W M93S66-W 5.5 Instructions Write all The Write All Memory with same data (WRAL) instruction is valid only after the Protection Register has been cleared by executing a Protection Register Clear (PRCLEAR) instruction. The Write All Memory with same data (WRAL) instruction simultaneously writes the whole memory with the same data word given in the instruction. Write Enable (W) must be held High before and during the instruction.
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Instructions M93S46-W M93S56-W M93S66-W Protection register read The Protection Register Read (PRREAD) instruction outputs, on Serial Data Output (Q), the content of the Protection Register, followed by the Protection Flag bit. The Protection Enable (PRE) signal must be driven High before and during the instruction. As with the Read Data from Memory (READ) instruction, a dummy 0 bit is output first.
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M93S46-W M93S56-W M93S66-W Instructions and Write Enable (W) signals must be driven High during the instruction execution. The OTP bit cannot be directly read, it can be checked by reading the content of the Protection Register, using the Protection Register Read (PRREAD) instruction, then by writing this same value back into the Protection Register, using the Protection Register Write (PRWRITE) instruction. When the OTP bit is set, the Ready/Busy status cannot appear on Serial Data Output (Q).
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Instructions M93S46-W M93S56-W M93S66-W Figure 6. PREAD, PRWRITE and PREN sequences Protect Register READ PRE S D 1 1 0 Xn X0 Q An ADDR OP CODE Protect Register WRITE A0 F DATA OUT F = Protect Flag PRE W S CHECK STATUS D 1 0 1 An A0 Q ADDR BUSY READY OP CODE Protect Register ENABLE PRE W S D 1 0 0 1 1 Xn X0 OP CODE Note: 22/37 For the meanings of An, Xn and Dn, see Table 2 and Table 3.
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M93S46-W M93S56-W M93S66-W Instructions Figure 7. PRCLEAR and PRDS sequences Protect Register CLEAR PRE W S CHECK STATUS D 111 111 Q ADDR BUSY READY OP CODE Protect Register DISABLE PRE W S CHECK STATUS D 100 000 Q ADDR BUSY READY OP CODE AI00892C Note: For the meanings of An, Xn and Dn, see Table 2 and Table 3.
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Power-up and delivery states M93S46-W M93S56-W M93S66-W 6 Power-up and delivery states 6.1 Power-up state After Power-up, the device is in the following state: 6.2 • low power Standby Power mode • deselected Initial delivery state The device is delivered with the memory array set at all 1s (FFh).
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M93S46-W M93S56-W M93S66-W 7 Maximum ratings Maximum ratings Stressing the device outside the ratings listed in Table 4: Absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the operating sections of this specification, is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4.
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DC and AC parameters 8 M93S46-W M93S56-W M93S66-W DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. Table 5. Operating conditions (M93Sx6-W) Symbol VCC TA Parameter Min. Max. Unit Supply voltage 2.5 5.5 V Ambient operating temperature (device grade 6) –40 85 °C Max. Unit Table 6. AC test measurement conditions Symbol CL Parameter Min.
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M93S46-W M93S56-W M93S66-W DC and AC parameters Table 7. Capacitance Symbol COUT CIN Note: Parameter Test condition Min. Max. Unit VOUT = 0 V - 5 pF VIN = 0 V - 5 pF Output capacitance (Q) Input capacitance Sampled only, not 100% tested, at TA= 25 °C. Table 8. Memory cell data retention(1) Parameter Test conditions Data retention TA = 55 °C Min. Unit 200 Year 1. For products identified by process letter K.
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DC and AC parameters M93S46-W M93S56-W M93S66-W Table 10. DC Characteristics (M93Sx6-W, device grade 6) Symbol Parameter ILI Input leakage current ILO Output leakage current ICC Supply current (CMOS inputs) Test condition Min. Max. Unit 0 V ≤ V IN ≤ V CC - ±2.5 µA 0 V ≤ V OUT ≤ V CC , Q in Hi-Z - ±2.5 µA VCC = 5 V, S = VIH, f = 1 MHz - 1.5 mA VCC = 2.5 V, S = VIH, f = 1 MHz - 1 mA VCC = 5 V, S = VIH, f = 2 MHz - 2 mA VCC = 2.5 V, S = VIH, f = 2 MHz - 1 mA VCC = 2.
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M93S46-W M93S56-W M93S66-W DC and AC parameters Table 11. AC Characteristics (M93Sx6-W, device grade 6) Test conditions specified in Table 5 and Table 6 Symbol Alt. fC fSK tPRVCH tPRES tWVCH tPES tCLPRX tSLWX Min. Max. Unit D.C.
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DC and AC parameters M93S46-W M93S56-W M93S66-W Figure 9. Synchronous timing (start and op-code input) PRE tPRVCH W tWVCH tCHCL C tCLSH tSHCH tCLCH S tDVCH START D tCHDX OP CODE OP CODE OP CODE INPUT START AI02025 Figure 10.
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M93S46-W M93S56-W M93S66-W DC and AC parameters Figure 11.
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Package mechanical data 9 M93S46-W M93S56-W M93S66-W Package mechanical data In order to meet environmental requirements, ST offers the device in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 12. SO8N – 8-lead plastic small outline 150 mils body width, package outline h x 45˚ A2 A c ccc b e 0.
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M93S46-W M93S56-W M93S66-W Package mechanical data Figure 13. PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package outline E b2 A2 A1 b A L c e eA eB D 8 E1 1 PDIP-B Note: Drawing is not to scale. Not recommended for new designs. Table 13. PDIP8 – 8 lead plastic dual in-line package, 300 mils body width, package mechanical data inches(1) millimeters Symbol Typ. Min. Max. Typ. Min. Max. A - - 5.33 - - 0.2098 A1 - 0.38 - - 0.015 - A2 3.3 2.92 4.95 0.1299 0.115 0.
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Package mechanical data M93S46-W M93S56-W M93S66-W Figure 14. TSSOP8 - 8-lead thin shrink small outline, package outline D 8 5 c E1 1 E 4 α L A1 A A2 L1 CP b e TSSOP8AM Note: Drawing is not to scale. Table 14. TSSOP8 - 8-lead thin shrink small outline, package mechanical data inches(1) millimeters Symbol Typ Min Max Typ Min Max A - - 1.2 - - 0.0472 A1 - 0.05 0.15 - 0.002 0.0059 A2 1 0.8 1.05 0.0394 0.0315 0.0413 b - 0.19 0.3 - 0.0075 0.0118 c - 0.09 0.
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M93S46-W M93S56-W M93S66-W 10 Part numbering Part numbering Table 15. Ordering information scheme Example: M93S66 – W MN 6 T P Device Type M93 = MICROWIRE serial access EEPROM (x16) with Block Protection Device Function 66 = 4 Kbit (256 x 16) 56 = 2 Kbit (128 x 16) 46 = 1 Kbit (64 x 16) Operating Voltage W = VCC = 2.5 to 5.
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Revision history 11 M93S46-W M93S56-W M93S66-W Revision history Table 16. Document revision history Date Revision Changes 07-Mar-2002 2.0 Document reformatted, and reworded, using the new template. Temperature range 1 removed. TSSOP8 (3x3mm) package added. New products, identified by the process letter W, added, with fc(max) increased to 1MHz for -R voltage range, and to 2MHz for all other ranges (and corresponding parameters adjusted). 26-Mar-2003 2.
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M93S46-W M93S56-W M93S66-W Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.