Datasheet

DocID5124 Rev 6 19/37
M93S46-W M93S56-W M93S66-W Instructions
5.5 Write all
The Write All Memory with same data (WRAL) instruction is valid only after the Protection
Register has been cleared by executing a Protection Register Clear (PRCLEAR) instruction.
The Write All Memory with same data (WRAL) instruction simultaneously writes the whole
memory with the same data word given in the instruction.
Write Enable (W) must be held High before and during the instruction. Input address and
data, on Serial Data Input (D) are sampled on the rising edge of Serial Clock (C).
After the last data bit has been sampled, the Chip Select Input (S) must be taken Low before
the next rising edge of Serial Clock (C). If Chip Select Input (S) is brought Low before or
after this specific time frame, the self-timed programming cycle will not be started, and the
addressed location will not be programmed.
While the M93Sx6 is performing a write cycle, and after a delay (t
SLSH
) before the status
information becomes available, Chip Select Input (S) can be driven High to monitor the
status of the write cycle. Serial Data Output (Q) is driven Low while the M93Sx6 is still busy,
and High when the cycle is complete, and the M93Sx6 is ready to receive a new instruction.
The M93Sx6 ignores any data on the bus while it is busy on a write cycle. Once the M93Sx6
is Ready, Serial Data Output (Q) is driven High, and remains in this state until a new start bit
is decoded or the Chip Select Input (S) is brought Low.
Programming is internally self-timed, so the external Serial Clock (C) may be disconnected
or left running after the start of a write cycle.
5.6 Write protection and protect register
The Protection Register on the M93Sx6 is used to adjust the amount of memory that is to be
write protected. The write protected area extends from the address given in the Protection
Register, up to the top address in the M93Sx6 device.
Two flag bits are used to indicate the Protection Register status:
• Protection Flag: this is used to enable/disable protection of the write-protected area of
the M93Sx6 memory
• OTP bit: when set, this disables access to the Protection Register, and thus prevents
any further modifications to the value in the Protection Register.
The lower-bound memory address is written to the Protection Register using the Protection
Register Write (PRWRITE) instruction. It can be read using the Protection Register Read
(PRREAD) instruction.
The Protection Register Enable (PREN) instruction must be executed before any
PRCLEAR, PRWRITE or PRDS instruction, and with appropriate levels applied to the
Protection Enable (PRE) and Write Enable (W) signals.
Write-access to the Protection Register is achieved by executing the following sequence:
• Execute the Write Enable (WEN) instruction
• Execute the Protection Register Enable (PREN) instruction
• Execute one PRWRITE, PRCLEAR or PRDS instructions, to set a new boundary
address in the Protection Register, to clear the protection address (to all 1s), or
permanently to freeze the value held in the Protection Register.