Datasheet

DocID5124 Rev 6 13/37
M93S46-W M93S56-W M93S66-W Instructions
Table 2. Instruction set for the M93S46
Instruction Description W PRE
Start
bit
Op-
code
Address
(1)
Data
Required
clock
cycles
Additional
comments
READ
Read Data
from Memory
X 0 1 10 A5-A0 Q15-Q0 - -
WRITE
Write Data to
Memory
1 0 1 01 A5-A0 D15-D0 25
Write is executed if
the address is not
inside the
Protected area
PAWRITE
Page Write to
Memory
10 1 11 A5-A0
N x
D15-D0
9 + N x 16
Write is executed if
all the N addresses
are not inside the
Protected area
WRAL
Write All
Memory with
same Data
1 0 1 00 01 XXXX D15-D0 25
Write all data if the
Protection Register
is cleared
WEN Write Enable 1 0 1 00 11 XXXX - 9 -
WDS Write Disable X 0 1 00 00 XXXX - 9 -
PRREAD
Protection
Register Read
X 1 1 10 XXXXXX
Q5-Q0 +
Flag
-
Data Output =
Protection Register
content +
Protection Flag bit
PRWRITE
Protection
Register Write
11 1 01 A5-A0 - 9
Data above
specified address
A5-A0 are
protected
PRCLEAR
Protection
Register Clear
1 1 1 11 111111 - 9
Protect Flag is also
cleared (cleared
Flag = 1)
PREN
Protection
Register
Enable
1 1 1 00 11XXXX - 9 -
PRDS
Protection
Register
Disable
1 1 1 00 000000 - 9
OTP bit is set
permanently
1. X = Don’t Care bit.